[PATCH v2 1/2] arm64: dts: s32g: add SCMI firmware node

Matthias Brugger mbrugger at suse.com
Mon Jan 22 06:39:09 PST 2024



On 22/01/2024 15:06, Ghennadi Procopciuc wrote:
> From: Ghennadi Procopciuc <ghennadi.procopciuc at nxp.com>
> 
> Linux controls the clocks over SCMI on S32G SoCs. Therefore,
> add the SCMI device tree node and the reserved region for SCMI
> messages.
> 
> Signed-off-by: Catalin Udma <catalin-dan.udma at nxp.com>
> Signed-off-by: Ghennadi Procopciuc <ghennadi.procopciuc at nxp.com>

Reviewed-by: Matthias Brugger <mbrugger at suse.com>

> ---
>   arch/arm64/boot/dts/freescale/s32g2.dtsi | 27 +++++++++++++++++++++++-
>   1 file changed, 26 insertions(+), 1 deletion(-)
> 
> diff --git a/arch/arm64/boot/dts/freescale/s32g2.dtsi b/arch/arm64/boot/dts/freescale/s32g2.dtsi
> index 5ac1cc9ff50e..ef1a1d61f2ba 100644
> --- a/arch/arm64/boot/dts/freescale/s32g2.dtsi
> +++ b/arch/arm64/boot/dts/freescale/s32g2.dtsi
> @@ -3,7 +3,7 @@
>    * NXP S32G2 SoC family
>    *
>    * Copyright (c) 2021 SUSE LLC
> - * Copyright (c) 2017-2021 NXP
> + * Copyright 2017-2021, 2024 NXP
>    */
>   
>   #include <dt-bindings/interrupt-controller/arm-gic.h>
> @@ -14,6 +14,18 @@ / {
>   	#address-cells = <2>;
>   	#size-cells = <2>;
>   
> +	reserved-memory  {
> +		#address-cells = <2>;
> +		#size-cells = <2>;
> +		ranges;
> +
> +		scmi_buf: shm at d0000000 {
> +			compatible = "arm,scmi-shmem";
> +			reg = <0x0 0xd0000000 0x0 0x80>;
> +			no-map;
> +		};
> +	};
> +
>   	cpus {
>   		#address-cells = <1>;
>   		#size-cells = <0>;
> @@ -77,6 +89,19 @@ timer {
>   	};
>   
>   	firmware {
> +		scmi {
> +			compatible = "arm,scmi-smc";
> +			arm,smc-id = <0xc20000fe>;
> +			#address-cells = <1>;
> +			#size-cells = <0>;
> +			shmem = <&scmi_buf>;
> +
> +			clks: protocol at 14 {
> +				reg = <0x14>;
> +				#clock-cells = <1>;
> +			};
> +		};
> +
>   		psci {
>   			compatible = "arm,psci-1.0";
>   			method = "smc";



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