[PATCH] dt-bindings: rtc: zynqmp: Describe power-domains property

[Buddhabhatti, Jay]

Hi Michal,

> -----Original Message-----
> From: Simek, Michal <michal.simek at amd.com>
> Sent: Tuesday, February 20, 2024 5:04 PM
> To: Buddhabhatti, Jay <jay.buddhabhatti at amd.com>; Alexandre Belloni
> <alexandre.belloni at bootlin.com>
> Cc: Krzysztof Kozlowski <krzysztof.kozlowski at linaro.org>; linux-
> kernel at vger.kernel.org; monstr at monstr.eu; michal.simek at xilinx.com;
> git at xilinx.com; Conor Dooley <conor+dt at kernel.org>; Krzysztof Kozlowski
> <krzysztof.kozlowski+dt at linaro.org>; Rob Herring <robh at kernel.org>; open
> list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS
> <devicetree at vger.kernel.org>; moderated list:ARM/ZYNQ ARCHITECTURE
> <linux-arm-kernel at lists.infradead.org>; open list:REAL TIME CLOCK (RTC)
> SUBSYSTEM <linux-rtc at vger.kernel.org>
> Subject: Re: [PATCH] dt-bindings: rtc: zynqmp: Describe power-domains
> property
> 
> 
> 
> On 2/20/24 11:51, Buddhabhatti, Jay wrote:
> > Hi Alexandre,
> >
> >> -----Original Message-----
> >> From: Alexandre Belloni <alexandre.belloni at bootlin.com>
> >> Sent: Tuesday, February 20, 2024 1:49 AM
> >> To: Simek, Michal <michal.simek at amd.com>
> >> Cc: Krzysztof Kozlowski <krzysztof.kozlowski at linaro.org>; linux-
> >> kernel at vger.kernel.org; monstr at monstr.eu; michal.simek at xilinx.com;
> >> git at xilinx.com; Conor Dooley <conor+dt at kernel.org>; Krzysztof
> >> Kozlowski <krzysztof.kozlowski+dt at linaro.org>; Rob Herring
> >> <robh at kernel.org>; open list:OPEN FIRMWARE AND FLATTENED DEVICE
> TREE
> >> BINDINGS <devicetree at vger.kernel.org>; moderated list:ARM/ZYNQ
> >> ARCHITECTURE <linux-arm-kernel at lists.infradead.org>; open list:REAL
> >> TIME CLOCK (RTC) SUBSYSTEM <linux-rtc at vger.kernel.org>
> >> Subject: Re: [PATCH] dt-bindings: rtc: zynqmp: Describe power-domains
> >> property
> >>
> >> On 19/02/2024 14:11:50+0100, Michal Simek wrote:
> >>>
> >>>
> >>> On 2/17/24 09:26, Krzysztof Kozlowski wrote:
> >>>> On 16/02/2024 10:42, Michal Simek wrote:
> >>>>>
> >>>>>
> >>>>> On 2/16/24 10:19, Krzysztof Kozlowski wrote:
> >>>>>> On 16/02/2024 09:51, Michal Simek wrote:
> >>>>>>> RTC has its own power domain on Xilinx Versal SOC that's why
> >>>>>>> describe it as optional property.
> >>>>>>>
> >>>>>>> Signed-off-by: Michal Simek <michal.simek at amd.com>
> >>>>>>> ---
> >>>>>>>
> >>>>>>>     Documentation/devicetree/bindings/rtc/xlnx,zynqmp-rtc.yaml |
> >>>>>>> 3
> >> +++
> >>>>>>>     1 file changed, 3 insertions(+)
> >>>>>>>
> >>>>>>
> >>>>>> But Versal is not described in this binding, is it? I see only
> >>>>>> one compatible.
> >>>>>
> >>>>> It is the same IP only as is on zynqmp with own power rail.
> >>>>
> >>>> Then you should have separate compatible, because they are not
> >>>> identical. It would also allow you to narrow the domains to versal
> >>>> and also require it (on versal).
> >>>
> >>> I can double check with HW guys but I am quite sure IP itself is
> >>> exactly the same. What it is different is that there is own power
> >>> domain to it (not shared one as is in zynqmp case).
> >>>
> >>> Also Linux is non secure sw and if secure firmware won't allow to
> >>> change setting of it it can't be required. I am just saying that
> >>> Linux doesn't need to be owner of any power domain that's why it
> >>> shouldn't be required property.
> >>
> >> I guess because the integration is different, you still need a
> >> differente compatible so you can forbid the property on non-Versal.
> >
> > [Jay] RTC has its own power domain in case of Versal and ZynqMP both that
> we double check it.
> 
> Thanks Jay for looking into it. I should definitely update my commit message to
> reflect it. Do you still want me to create soc specific property?

[Jay] This should be for both ZynqMP and Versal since RTC have its own power domain we should add power domain property for both SoCs.

> 
> Thanks,
> Michal