[PATCH 2/4] ARM: Move asm statements accessing TTBCR into C functions

[Ard Biesheuvel]

On Tue, 23 Jan 2024 at 22:16, Linus Walleij <linus.walleij at linaro.org> wrote:
>
> From: Catalin Marinas <catalin.marinas at arm.com>
>
> This patch implements cpu_get_ttbcr() and cpu_set_ttbcr() and replaces
> the corresponding asm statements.
>
> Signed-off-by: Catalin Marinas <catalin.marinas at arm.com>
> Reviewed-by: Kees Cook <keescook at chromium.org>
> Signed-off-by: Linus Walleij <linus.walleij at linaro.org>
> ---
>  arch/arm/include/asm/proc-fns.h | 12 ++++++++++++
>  arch/arm/mm/mmu.c               |  7 +++----
>  2 files changed, 15 insertions(+), 4 deletions(-)
>
> diff --git a/arch/arm/include/asm/proc-fns.h b/arch/arm/include/asm/proc-fns.h
> index 280396483f5d..a13e5cf3d1ff 100644
> --- a/arch/arm/include/asm/proc-fns.h
> +++ b/arch/arm/include/asm/proc-fns.h
> @@ -178,6 +178,18 @@ extern void cpu_resume(void);
>         })
>  #endif
>
> +static inline unsigned int cpu_get_ttbcr(void)
> +{
> +       unsigned int ttbcr;
> +       asm("mrc p15, 0, %0, c2, c0, 2" : "=r" (ttbcr));
> +       return ttbcr;
> +}
> +
> +static inline void cpu_set_ttbcr(unsigned int ttbcr)
> +{
> +       asm volatile("mcr p15, 0, %0, c2, c0, 2" : : "r" (ttbcr));

Nit: the 'volatile' is unnecessary here - there are no output
operands, so the compiler has to assume that the statement has side
effects.

> +}
> +
>  #else  /*!CONFIG_MMU */
>
>  #define cpu_switch_mm(pgd,mm)  { }
> diff --git a/arch/arm/mm/mmu.c b/arch/arm/mm/mmu.c
> index 674ed71573a8..9a780da6a4e1 100644
> --- a/arch/arm/mm/mmu.c
> +++ b/arch/arm/mm/mmu.c
> @@ -1687,9 +1687,8 @@ static void __init early_paging_init(const struct machine_desc *mdesc)
>          */
>         cr = get_cr();
>         set_cr(cr & ~(CR_I | CR_C));
> -       asm("mrc p15, 0, %0, c2, c0, 2" : "=r" (ttbcr));
> -       asm volatile("mcr p15, 0, %0, c2, c0, 2"
> -               : : "r" (ttbcr & ~(3 << 8 | 3 << 10)));
> +       ttbcr = cpu_get_ttbcr();
> +       cpu_set_ttbcr(ttbcr & ~(3 << 8 | 3 << 10));
>         flush_cache_all();
>
>         /*
> @@ -1701,7 +1700,7 @@ static void __init early_paging_init(const struct machine_desc *mdesc)
>         lpae_pgtables_remap(offset, pa_pgd);
>
>         /* Re-enable the caches and cacheable TLB walks */
> -       asm volatile("mcr p15, 0, %0, c2, c0, 2" : : "r" (ttbcr));
> +       cpu_set_ttbcr(ttbcr);
>         set_cr(cr);
>  }
>
>
> --
> 2.34.1
>