[PATCH] ARM: iwmmxt: Remove support for PJ4/PJ4B cores

[Arnd Bergmann]

On Fri, Feb 9, 2024, at 12:09, Ard Biesheuvel wrote:
> From: Ard Biesheuvel <ardb at kernel.org>
>
> PJ4 is a v7 core that incorporates a iWMMXt coprocessor. However, GCC
> does not support this combination (its iWMMXt configuration always
> implies v5te), and so there is no v6/v7 user space that actually makes
> use of this, beyond generic support for things like setjmp() that
> preserve/restore the iWMMXt register file using generic LDC/STC
> instructions emitted in assembler. As [0] appears to imply, this logic
> is triggered for the init process at boot, and so most processes will
> have a iWMMXt register context associated with it, even though it is
> never used.
>
> This means that advertising iWMMXt support on these cores results in
> context switch overhead without any associated benefit, and so it is
> better to simply ignore the iWMMXt unit on these systems. So rip out the
> support. Doing so also fixes the issue reported in [0] related to UNDEF
> handling of co-processor #0/#1 instructions issued from user space
> running in Thumb2 mode.
>
> Cc: Arnd Bergmann <arnd at arndb.de>
> Cc: Nicolas Pitre <nico at fluxnic.net>
> Cc: Russell King <linux at armlinux.org.uk>
> Cc: Linus Walleij <linus.walleij at linaro.org>
> Fixes: 8bcba70cb5c22 ("ARM: entry: Disregard Thumb undef exception ...")
> Link: https://bugzilla.kernel.org/show_bug.cgi?id=218427 [0]
> Signed-off-by: Ard Biesheuvel <ardb at kernel.org>

Acked-by: Arnd Bergmann <arnd at arndb.de>

Maybe add a bit about which cores are actually affected by this:

The PJ4 cores are used in four platforms: armada 370/xp, dove
(cubox, d2plug), mmp2 (xo-1.75) and berlin (chromecast 1).
Out of these, only the first is still widely used, but that
one actually doesn't have iwmmxt but instead has only
vfpv3-d16.

I've also added the maintainers of those platforms to Cc,
in case anyone has objections after all.

      Arnd