[PATCH v4 04/10] arm64: sysreg: Add layout for ID_AA64MMFR4_EL1

Miguel Luis miguel.luis at oracle.com
Thu Feb 8 05:06:52 PST 2024


Hi Marc,

> On 22 Jan 2024, at 17:13, Marc Zyngier <maz at kernel.org> wrote:
> 
> ARMv9.5 has infroduced ID_AA64MMFR4_EL1 with a bunch of new features.
> Add the corresponding layout.
> 
> This is extracted from the public ARM SysReg_xml_A_profile-2023-09
> delivery, timestamped d55f5af8e09052abe92a02adf820deea2eaed717.
> 
> Reviewed-by: Suzuki K Poulose <suzuki.poulose at arm.com>
> Signed-off-by: Marc Zyngier <maz at kernel.org>
> ---
> arch/arm64/tools/sysreg | 37 +++++++++++++++++++++++++++++++++++++
> 1 file changed, 37 insertions(+)
> 
> diff --git a/arch/arm64/tools/sysreg b/arch/arm64/tools/sysreg
> index 4c9b67934367..fa3fe0856880 100644
> --- a/arch/arm64/tools/sysreg
> +++ b/arch/arm64/tools/sysreg
> @@ -1791,6 +1791,43 @@ UnsignedEnum 3:0 TCRX
> EndEnum
> EndSysreg
> 
> +Sysreg ID_AA64MMFR4_EL1 3 0 0 7 4
> +Res0 63:40
> +UnsignedEnum 39:36 E3DSE
> + 0b0000 NI
> + 0b0001 IMP
> +EndEnum
> +Res0 35:28
> +SignedEnum 27:24 E2H0
> + 0b0000 IMP
> + 0b1110 NI_NV1
> + 0b1111 NI
> +EndEnum
> +UnsignedEnum 23:20 NV_frac
> + 0b0000 NV_NV2
> + 0b0001 NV2_ONLY
> +EndEnum
> +UnsignedEnum 19:16 FGWTE3
> + 0b0000 NI
> + 0b0001 IMP
> +EndEnum
> +UnsignedEnum 15:12 HACDBS
> + 0b0000 NI
> + 0b0001 IMP
> +EndEnum
> +UnsignedEnum 11:8 ASID2
> + 0b0000 NI
> + 0b0001 IMP
> +EndEnum
> +SignedEnum 7:4 EIESB
> + 0b0000 NI
> + 0b0001 ToEL3
> + 0b0010 ToELx
> + 0b1111 ANY
> +EndEnum
> +Res0 3:0
> +EndSysreg
> +

Reviewed-by: Miguel Luis <miguel.luis at oracle.com>

Would you please help me understand how the kernel would cope with E2H0’s
0b0000  value on systems prior to ARMv9.5 where a read to
ID_AA64MMFR4_EL1 would be RES0 ?

Thanks

Miguel

> Sysreg SCTLR_EL1 3 0 1 0 0
> Field 63 TIDCP
> Field 62 SPINTMASK
> -- 
> 2.39.2
> 
> 
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