[PATCH net-next v3] net: ti: icssg_prueth: Add SW TX / RX Coalescing based on hrtimers
Simon Horman
horms at kernel.org
Tue Apr 30 12:49:38 PDT 2024
On Tue, Apr 30, 2024 at 05:36:34PM +0530, MD Danish Anwar wrote:
> Add SW IRQ coalescing based on hrtimers for RX and TX data path for ICSSG
> driver, which can be enabled by ethtool commands:
>
> - RX coalescing
> ethtool -C eth1 rx-usecs 50
>
> - TX coalescing can be enabled per TX queue
>
> - by default enables coalescing for TX0
> ethtool -C eth1 tx-usecs 50
> - configure TX0
> ethtool -Q eth0 queue_mask 1 --coalesce tx-usecs 100
> - configure TX1
> ethtool -Q eth0 queue_mask 2 --coalesce tx-usecs 100
> - configure TX0 and TX1
> ethtool -Q eth0 queue_mask 3 --coalesce tx-usecs 100 --coalesce
> tx-usecs 100
>
> Minimum value for both rx-usecs and tx-usecs is 20us.
>
> Compared to gro_flush_timeout and napi_defer_hard_irqs this patch allows
> to enable IRQ coalescing for RX path separately.
>
> Benchmarking numbers:
> ===============================================================
> | Method | Tput_TX | CPU_TX | Tput_RX | CPU_RX |
> | ==============================================================
> | Default Driver 943 Mbps 31% 517 Mbps 38% |
> | IRQ Coalescing (Patch) 943 Mbps 28% 518 Mbps 25% |
> ===============================================================
>
> Signed-off-by: MD Danish Anwar <danishanwar at ti.com>
> Reviewed-by: Andrew Lunn <andrew at lunn.ch>
> ---
> Changes from v2 [2] to v3:
> *) Collected RB tag from Andrew Lunn <andrew at lunn.ch>
> *) Fixed warning caused by {} missing for outer if conditions in
> emac_napi_tx_poll() and emac_napi_rx_poll() APIs.
> *) Fixed spelling mistake.
Thanks for the updates.
This one looks good to me.
Reviewed-by: Simon Horman <horms at kernel.org>
>
> Changes from v1 [1] to v2:
> *) Added Benchmarking numbers in the commit message as suggested by
> Andrew Lunn <andrew at lunn.ch>. Full logs [3]
> *) Addressed comments given by Simon Horman <horms at kernel.org> in v1.
>
> [1] https://lore.kernel.org/all/20240424091823.1814136-1-danishanwar@ti.com/
> [2] https://lore.kernel.org/all/20240429071501.547680-1-danishanwar@ti.com/
> [3] https://gist.githubusercontent.com/danish-ti/47855631be9f3635cee994693662a988/raw/94b4eb86b42fe243ab03186a88a314e0cb272fd0/gistfile1.txt
...
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