[PATCH 2/3] arm64: dts: ti: k3-j722s: Redefine USB1 node description

[Ravi Gunasekaran]

USB1 controller on J722S and AM62P are from different vendors.
Redefine the USB1 node description for J722S by deleting the
node inherited from AM62P dtsi.

Signed-off-by: Ravi Gunasekaran <r-gunasekaran at ti.com>
---
 arch/arm64/boot/dts/ti/k3-j722s.dtsi | 39 ++++++++++++++++++++++++++++
 1 file changed, 39 insertions(+)

diff --git a/arch/arm64/boot/dts/ti/k3-j722s.dtsi b/arch/arm64/boot/dts/ti/k3-j722s.dtsi
index beba5a3ea6cc..90725eeb3178 100644
--- a/arch/arm64/boot/dts/ti/k3-j722s.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j722s.dtsi
@@ -13,6 +13,13 @@
 
 #include "k3-am62p5.dtsi"
 
+/*
+ * USB1 controller on AM62P and J722S are of different IP.
+ * Delete AM62P's USBSS1 node definition and redefine it for J722S.
+ */
+
+/delete-node/ &usbss1;
+
 / {
 	model = "Texas Instruments K3 J722S SoC";
 	compatible = "ti,j722s";
@@ -120,6 +127,38 @@
 			status = "disabled"; /* Needs lane config */
 		};
 	};
+
+	usbss1: cdns-usb at f920000 {
+		compatible = "ti,j721e-usb";
+		reg = <0x00 0x0f920000 0x00 0x100>;
+		ranges;
+		power-domains = <&k3_pds 278 TI_SCI_PD_EXCLUSIVE>;
+		clocks = <&k3_clks 278 3>, <&k3_clks 278 1>;
+		clock-names = "ref", "lpm";
+		assigned-clocks = <&k3_clks 278 3>; /* USB2_REFCLK */
+		assigned-clock-parents = <&k3_clks 278 4>; /* HF0SC0 */
+		#address-cells = <2>;
+		#size-cells = <2>;
+		status = "disabled";
+
+		usb1: usb at 31200000{
+			compatible = "cdns,usb3";
+			reg = <0x00 0x31200000 0x00 0x10000>,
+			      <0x00 0x31210000 0x00 0x10000>,
+			      <0x00 0x31220000 0x00 0x10000>;
+			reg-names = "otg",
+				    "xhci",
+				    "dev";
+			interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>, /* irq.0 */
+				     <GIC_SPI 232 IRQ_TYPE_LEVEL_HIGH>, /* irq.6 */
+				     <GIC_SPI 245 IRQ_TYPE_LEVEL_HIGH>; /* otgirq */
+			interrupt-names = "host",
+					  "peripheral",
+					  "otg";
+			maximum-speed = "super-speed";
+			dr_mode = "otg";
+		};
+	};
 };
 
 /* Main domain overrides */
-- 
2.17.1