[PATCH V2 0/2] Fix Coresight instruction synthesis logic

[Arnaldo Carvalho de Melo]

On Thu, Apr 04, 2024 at 11:37:29PM +0530, Tanmay Jagdale wrote:
> When we use perf to catpure Coresight trace and generate instruction
> trace using 'perf script', we get the following output:
> 
> # perf record -e cs_etm/@tmc_etr0/ -C 9 taskset -c 9 sleep 1
> # perf script --itrace=i1ns --ns -Fcomm,tid,pid,time,cpu,event,ip,sym,addr,symoff,flags,callindent

Applies cleanly, can some Coresight people review this and provide a
Reviewed-by?

Thanks!

- Arnaldo

⬢[acme at toolbox perf-tools-next]$ b4 am -ctsl --cc-trailers 20240404180731.7006-3-tanmay at marvell.com
Grabbing thread from lore.kernel.org/all/20240404180731.7006-3-tanmay at marvell.com/t.mbox.gz
Checking for newer revisions
Grabbing search results from lore.kernel.org
Analyzing 3 messages in the thread
Checking attestation on all messages, may take a moment...
---
  ✓ [PATCH v2 1/2] perf: cs-etm: Fixes in instruction sample synthesis
    + Link: https://lore.kernel.org/r/20240404180731.7006-2-tanmay@marvell.com
    + Signed-off-by: Arnaldo Carvalho de Melo <acme at redhat.com>
  ✓ [PATCH v2 2/2] perf: cs-etm: Store previous timestamp in packet queue
    + Link: https://lore.kernel.org/r/20240404180731.7006-3-tanmay@marvell.com
    + Signed-off-by: Arnaldo Carvalho de Melo <acme at redhat.com>
  ---
  ✓ Signed: DKIM/marvell.com
---
Total patches: 2
---
Cover: ./v2_20240404_tanmay_fix_coresight_instruction_synthesis_logic.cover
 Link: https://lore.kernel.org/r/20240404180731.7006-1-tanmay@marvell.com
 Base: applies clean to current tree
       git checkout -b v2_20240404_tanmay_marvell_com HEAD
       git am ./v2_20240404_tanmay_fix_coresight_instruction_synthesis_logic.mbx
⬢[acme at toolbox perf-tools-next]$