[PATCH 1/2] arm64/head: Drop unnecessary pre-disable-MMU workaround

[Marc Zyngier]

On Mon, 15 Apr 2024 08:54:14 +0100,
Ard Biesheuvel <ardb+git at google.com> wrote:
> 
> From: Ard Biesheuvel <ardb at kernel.org>
> 
> The Falkor erratum that results in the need for an ISB before clearing
> the M bit in SCTLR_ELx only applies to execution at exception level x,
> and so the workaround is not needed when disabling the EL1 MMU while
> running at EL2.
> 
> Signed-off-by: Ard Biesheuvel <ardb at kernel.org>
> ---
>  arch/arm64/kernel/head.S | 2 --
>  1 file changed, 2 deletions(-)
> 
> diff --git a/arch/arm64/kernel/head.S b/arch/arm64/kernel/head.S
> index 06234c3a15f3..b8bbd72cb194 100644
> --- a/arch/arm64/kernel/head.S
> +++ b/arch/arm64/kernel/head.S
> @@ -323,13 +323,11 @@ SYM_INNER_LABEL(init_el2, SYM_L_LOCAL)
>  	cbz	x0, 2f
>  
>  	/* Set a sane SCTLR_EL1, the VHE way */
> -	pre_disable_mmu_workaround
>  	msr_s	SYS_SCTLR_EL12, x1
>  	mov	x2, #BOOT_CPU_FLAG_E2H
>  	b	3f
>  
>  2:
> -	pre_disable_mmu_workaround
>  	msr	sctlr_el1, x1
>  	mov	x2, xzr
>  3:

Acked-by: Marc Zyngier <maz at kernel.org>

	M.

-- 
Without deviation from the norm, progress is not possible.