[PATCH v2] arm64: Fix double TCR_T0SZ_OFFSET shift

[Seongsu Park]

We have already shifted the value of t0sz in TCR_T0SZ by TCR_T0SZ_OFFSET.
So, the TCR_T0SZ_OFFSET shift here should be removed.

Co-developed-by: Leem ChaeHoon <infinite.run at gmail.com>
Signed-off-by: Leem ChaeHoon <infinite.run at gmail.com>
Co-developed-by: Gyeonggeon Choi <gychoi at student.42seoul.kr>
Signed-off-by: Gyeonggeon Choi <gychoi at student.42seoul.kr>
Co-developed-by: Soomin Cho <to.soomin at gmail.com>
Signed-off-by: Soomin Cho <to.soomin at gmail.com>
Co-developed-by: DaeRo Lee <skseofh at gmail.com>
Signed-off-by: DaeRo Lee <skseofh at gmail.com>
Co-developed-by: kmasta <kmasta.study at gmail.com>
Signed-off-by: kmasta <kmasta.study at gmail.com>
Signed-off-by: Seongsu Park <sgsu.park at samsung.com>
---

Changes in v2:
- Condition is updated

---
 arch/arm64/include/asm/mmu_context.h | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm64/include/asm/mmu_context.h b/arch/arm64/include/asm/mmu_context.h
index c768d16b81a4..bd19f4c758b7 100644
--- a/arch/arm64/include/asm/mmu_context.h
+++ b/arch/arm64/include/asm/mmu_context.h
@@ -72,11 +72,11 @@ static inline void __cpu_set_tcr_t0sz(unsigned long t0sz)
 {
 	unsigned long tcr = read_sysreg(tcr_el1);
 
-	if ((tcr & TCR_T0SZ_MASK) >> TCR_T0SZ_OFFSET == t0sz)
+	if ((tcr & TCR_T0SZ_MASK) == t0sz)
 		return;
 
 	tcr &= ~TCR_T0SZ_MASK;
-	tcr |= t0sz << TCR_T0SZ_OFFSET;
+	tcr |= t0sz;
 	write_sysreg(tcr, tcr_el1);
 	isb();
 }
-- 
2.34.1