[PATCH] sbsa_gwdt: Calculate timeout with 64-bit math

[Guenter Roeck]

On Thu, Sep 21, 2023 at 02:02:36AM -0700, Darren Hart wrote:
> Commit abd3ac7902fb ("watchdog: sbsa: Support architecture version 1")
> introduced new timer math for watchdog revision 1 with the 48 bit offset
> register.
> 
> The gwdt->clk and timeout are u32, but the argument being calculated is
> u64. Without a cast, the compiler performs u32 operations, truncating
> intermediate steps, resulting in incorrect values.
> 
> A watchdog revision 1 implementation with a gwdt->clk of 1GHz and a
> timeout of 600s writes 3647256576 to the one shot watchdog instead of
> 300000000000, resulting in the watchdog firing in 3.6s instead of 600s.
> 
> Force u64 math by casting the first argument (gwdt->clk) as a u64. Make
> the order of operations explicit with parenthesis.
> 
> Fixes: abd3ac7902fb ("watchdog: sbsa: Support architecture version 1")
> Reported-by: Vanshidhar Konda <vanshikonda at os.amperecomputing.com>
> Signed-off-by: Darren Hart <darren at os.amperecomputing.com>
> Cc: Wim Van Sebroeck <wim at linux-watchdog.org>
> Cc: Guenter Roeck <linux at roeck-us.net>
> Cc: linux-watchdog at vger.kernel.org
> Cc: linux-kernel at vger.kernel.org
> Cc: linux-arm-kernel at lists.infradead.org
> Cc: <stable at vger.kernel.org> # 5.14.x

Reviewed-by: Guenter Roeck <linux at roeck-us.net>

> ---
>  drivers/watchdog/sbsa_gwdt.c | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/watchdog/sbsa_gwdt.c b/drivers/watchdog/sbsa_gwdt.c
> index fd3cfdda4949..76527324b63c 100644
> --- a/drivers/watchdog/sbsa_gwdt.c
> +++ b/drivers/watchdog/sbsa_gwdt.c
> @@ -153,14 +153,14 @@ static int sbsa_gwdt_set_timeout(struct watchdog_device *wdd,
>  	timeout = clamp_t(unsigned int, timeout, 1, wdd->max_hw_heartbeat_ms / 1000);
>  
>  	if (action)
> -		sbsa_gwdt_reg_write(gwdt->clk * timeout, gwdt);
> +		sbsa_gwdt_reg_write((u64)gwdt->clk * timeout, gwdt);
>  	else
>  		/*
>  		 * In the single stage mode, The first signal (WS0) is ignored,
>  		 * the timeout is (WOR * 2), so the WOR should be configured
>  		 * to half value of timeout.
>  		 */
> -		sbsa_gwdt_reg_write(gwdt->clk / 2 * timeout, gwdt);
> +		sbsa_gwdt_reg_write(((u64)gwdt->clk / 2) * timeout, gwdt);
>  
>  	return 0;
>  }
> -- 
> 2.41.0
>