[PATCH V5 - RESEND 2/3] coresight: etm: Make cycle count threshold user configurable

Anshuman Khandual anshuman.khandual at arm.com
Wed Sep 20 03:44:56 PDT 2023



On 9/20/23 14:52, Suzuki K Poulose wrote:
> On 15/09/2023 10:36, Anshuman Khandual wrote:
>> Cycle counting is enabled, when requested and supported but with a default
>> threshold value ETM_CYC_THRESHOLD_DEFAULT i.e 0x100 getting into TRCCCCTLR,
>> representing the minimum interval between cycle count trace packets.
> 
> minor nit:
> 
> When Cycle counting is enabled, we use a default threshold value (0x100) for the instruction trace cycle counting.
>>
>> This makes cycle threshold user configurable, from the user space via perf
>> event attributes. Although it falls back using ETM_CYC_THRESHOLD_DEFAULT,
>> in case no explicit request.
> 
> Minor nit:
> 
> This patch makes the cycle threshold user configurable via perf event
> attributes( 'cc_threshold' => event->attr.config3[11:0] ), falling back
> to the the current default if unspecified.
> 
> 
> 
>> As expected it creates a sysfs file as well.
> 
> 
>>
>> /sys/bus/event_source/devices/cs_etm/format/cc_threshold
>>
>> New 'cc_threshold' uses 'event->attr.config3' as no more space is available
>> in 'event->attr.config1' or 'event->attr.config2'.
> 
> Trim the above part.
> 
> 
> Rest looks fine to me.

Will change the commit message as follows.


    coresight: etm: Make cycle count threshold user configurable
    
    When cycle counting is enabled, we use a default threshold value i.e 0x100
    for the instruction trace cycle counting.
    
    This patch makes the cycle threshold user configurable via perf event
    attributes( 'cc_threshold' => event->attr.config3[11:0] ), falling back
    to the current default if unspecified.



More information about the linux-arm-kernel mailing list