[PATCH] ARM: mm: Fix ARCH_LOW_ADDRESS_LIMIT when CONFIG_ZONE_DMA

Robin Murphy robin.murphy at arm.com
Wed Sep 6 04:38:21 PDT 2023


On 2023-09-06 11:31, Stefan Wahren wrote:
> Hi,
> 
> Am 03.06.23 um 15:58 schrieb Lukas Wunner:
>> On Sat, Jun 03, 2023 at 02:59:53PM +0200, Arnd Bergmann wrote:
>>> On Sat, Jun 3, 2023, at 14:38, Russell King (Oracle) wrote:
>>>> On Sat, Jun 03, 2023 at 02:33:49PM +0200, Arnd Bergmann wrote:
>>>>> Changing the low address limit by itself makes the swiotlb work
>>>>> correctly, but for performance we also want to avoid having to
>>>>> use the swiotlb at all when dealing with the zero page.
>>>>
>>>> How often is the zero page used for DMA _to_ a device (it should never
>>>> be used for DMA _from_ a device.) ? It doesn't sound that useful to me,
>>>> since it can only be used for writing zeros.
>>>
>>> It's possible that this doesn't happen all that much at all, the
>>> bcm2835-dma driver is the only one that has a specific optimization
>>> for this case, introduced in commit bf75703d0912d ("dmaengine:
>>> bcm2835: Avoid accessing memory when copying zeroes").
>>>
>>> If the ZERO page can only be mapped through swiotlb, that
>>> optimization is clearly counterproductive because it requires
>>> making a copy of the zero page but doesn't actually skip
>>> any transfers.
>>>
>>> I don't really understand what the spi driver is doing here,
>>> but I can see that it still contains the code that originally
>>> started the discussion about the change to the DMA driver,
>>> so I assume it's still used that way.
>>
>> SPI is a bidirectional bus, i.e. you receive as many bytes as you write.
>>
>> When you're receiving an Ethernet frame from an SPI-attached network 
>> chip,
>> you need to clock out bytes in order to clock in the Ethernet frame.
>> The content of those bytes you clock out doesn't matter.  They can be
>> zeroes or anything else.
>>
>> The Raspberry Pi's BCM2835 DMA controller is capable of synthesizing 
>> zeroes
>> and writing them to the SPI controller's FIFO.  This reduces traffic 
>> on the
>> memory bus because you don't need to copy data from memory to the FIFO.
>>
>> Unfortunately only a subset of the DMA channels has that capability.
>> If the SPI controller happens to get only one of the inferior "lite"
>> channels, it needs to fall back to copying data from memory.  To avoid
>> having to map a page for that, it simply reuses the zero page.
>>
>> Hope that sheds some light on what the driver is doing there.
> 
> i'm bit a lost in this old discussion. Arnd sent a Reviewed-By to the 
> patch.
> 
> Shall i send this to RMK's patch system?

I think so - I don't remember how we got into the SPI thing, but that 
looks somewhat bogus and broken, and doesn't matter to the correctness 
of this patch in itself.

Thanks,
Robin.

> 
> Or is the patch not sufficient enough?
> 
>>
>> Thanks,
>>
>> Lukas



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