[PATCH 3/5] dt-bindings: nvmem: Add nodes for ZynqMP efuses

[Krzysztof Kozlowski]

On 13/10/2023 12:14, Praveen Teja Kundanala wrote:
> Added nodes for ZynqMP specific purpose and PUF user efuses

Why?

> 
> Signed-off-by: Praveen Teja Kundanala <praveen.teja.kundanala at amd.com>
> ---
>  .../bindings/nvmem/xlnx,zynqmp-nvmem.yaml     | 213 +++++++++++++++++-
>  1 file changed, 212 insertions(+), 1 deletion(-)
> 
> diff --git a/Documentation/devicetree/bindings/nvmem/xlnx,zynqmp-nvmem.yaml b/Documentation/devicetree/bindings/nvmem/xlnx,zynqmp-nvmem.yaml
> index e03ed8c32537..d2a036a80cda 100644
> --- a/Documentation/devicetree/bindings/nvmem/xlnx,zynqmp-nvmem.yaml
> +++ b/Documentation/devicetree/bindings/nvmem/xlnx,zynqmp-nvmem.yaml
> @@ -8,7 +8,7 @@ title: Zynq UltraScale+ MPSoC Non Volatile Memory interface
>  
>  description: |
>      The ZynqMP MPSoC provides access to the hardware related data
> -    like SOC revision, IDCODE.
> +    like SOC revision, IDCODE and specific purpose efuses.
>  
>  maintainers:
>    - Kalyani Akula <kalyani.akula at amd.com>
> @@ -43,6 +43,140 @@ patternProperties:
>      required:
>        - reg
>  
> +  "^efuse_dna at c$":

No, no underscores in node names. From where did you get this pattern?
Which upstream code has it?

All this and further parts are questionable. I don't understand why do
you do it.

Best regards,
Krzysztof