[PATCH] fpga: zynq-fpga: Ensure proper xCAP interface switch

Nava kishore Manne nava.kishore.manne at amd.com
Fri May 19 03:32:32 PDT 2023


From: Alfonso Rodriguez <alfonso.rodriguezm at upm.es>

Ensure that the low-level fpga-manager driver for Zynq-7000 devices
switches between reconfiguration interfaces as specified in the TRM
(section 6.5.1: "Ensure that all outstanding transactions are completed
before changing interfaces"); device (re)configuration may fail otherwise

Signed-off-by: Alfonso Rodriguez <alfonso.rodriguezm at upm.es>
Tested-by: Nava kishore Manne <nava.kishore.manne at amd.com>
---
 drivers/fpga/zynq-fpga.c | 9 +++++----
 1 file changed, 5 insertions(+), 4 deletions(-)

diff --git a/drivers/fpga/zynq-fpga.c b/drivers/fpga/zynq-fpga.c
index ae0da361e6c6..88db9ac36887 100644
--- a/drivers/fpga/zynq-fpga.c
+++ b/drivers/fpga/zynq-fpga.c
@@ -493,15 +493,16 @@ static int zynq_fpga_ops_write_complete(struct fpga_manager *mgr,
 	if (err)
 		return err;
 
-	/* Release 'PR' control back to the ICAP */
-	zynq_fpga_write(priv, CTRL_OFFSET,
-		zynq_fpga_read(priv, CTRL_OFFSET) & ~CTRL_PCAP_PR_MASK);
-
 	err = zynq_fpga_poll_timeout(priv, INT_STS_OFFSET, intr_status,
 				     intr_status & IXR_PCFG_DONE_MASK,
 				     INIT_POLL_DELAY,
 				     INIT_POLL_TIMEOUT);
 
+	/* Release 'PR' control back to the ICAP */
+	zynq_fpga_write(priv, CTRL_OFFSET,
+			zynq_fpga_read(priv, CTRL_OFFSET)
+			& ~CTRL_PCAP_PR_MASK);
+
 	clk_disable(priv->clk);
 
 	if (err)
-- 
2.25.1




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