[PATCH v2 2/2] perf: Add xilinx APM support

Datta, Shubhrajyoti shubhrajyoti.datta at amd.com
Tue May 9 23:16:10 PDT 2023


[AMD Official Use Only - General]

Hi Robin,

My apologies for the late reply.

> -----Original Message-----
> From: Robin Murphy <robin.murphy at arm.com>
> Sent: Saturday, January 14, 2023 1:41 AM
> To: Datta, Shubhrajyoti <shubhrajyoti.datta at amd.com>; linux-arm-
> kernel at lists.infradead.org
> Cc: git (AMD-Xilinx) <git at amd.com>; devicetree at vger.kernel.org;
> michal.simek at xilinx.com; krzysztof.kozlowski+dt at linaro.org;
> robh+dt at kernel.org
> Subject: Re: [PATCH v2 2/2] perf: Add xilinx APM support
>
> Caution: This message originated from an External Source. Use proper
> caution when opening attachments, clicking links, or responding.
>
>
> On 2022-12-22 08:42, Shubhrajyoti Datta wrote:
> > The programmable AXI performance monitors (APM) collect real-time
> > transaction metrics at multiple points on the AXI interconnect to help
> > system software profile real-time activity. In our platform we have it
> > in PL and also some of the hardened instances in PS.
> > Add Xilinx APM driver support.
> >
> > Signed-off-by: Shubhrajyoti Datta <shubhrajyoti.datta at amd.com>
> > ---
> >
> > +
> > +XAPM_EVENT(write_cnt_9,   WRITE_TRANSACTION | (9 << 4));
> > +XAPM_EVENT(read_cnt_9,  READ_TRANSACTION | (9 << 4));
> > +XAPM_EVENT(writebyte_cnt_9,   WRITE_BYTE | (9 << 4));
> > +XAPM_EVENT(readbyte_cnt_9,  READ_BYTE | (9 << 4));
> > +XAPM_EVENT(slvwridle_cnt_9,  SLV_WR_IDLE | (9 << 4));
> > +XAPM_EVENT(mstrdidle_cnt_9,  MST_RD_IDLE | (9 << 4));
> > +XAPM_EVENT(readlatency_cnt_9,  READ_LATENCY | (9 << 4));
> > +XAPM_EVENT(writelatency_cnt_9,   WRITE_LATENCY | (9 << 4));
>
> Do we really need to expose apparently the same set of events 10 times
> over? Judging from the code below, I'm guessing the mystery number is
> some sort of counter index, which at best could probably be a separate
> config field orthogonal to the actual event type, but possibly is something the
> driver could allocate automatically?
>
The driver supports the same driver for the PL (Programable Logic ) usecase.
In which case the hardware that it monitors depends on the which counter that it
Is listening to . I need to redesign the solution .





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