[PATCH] ARM: dts: imx25/karo-tx25: Replace NO_PAD_CTL by explicit pad configuration

[Uwe Kleine-König]

On Thu, Jun 15, 2023 at 11:41:00AM +0200, Uwe Kleine-König wrote:
> Instead of using 0x80000000 explicitly specify the reset defaults for
> the pad settings. This way the pad configuration is explicit and so
> isn't affected by changes that might have been done in the bootloader.
> 
> Signed-off-by: Uwe Kleine-König <u.kleine-koenig at pengutronix.de>
> ---
>  arch/arm/boot/dts/imx25-karo-tx25.dts | 50 +++++++++++++--------------
>  1 file changed, 25 insertions(+), 25 deletions(-)
> 
> diff --git a/arch/arm/boot/dts/imx25-karo-tx25.dts b/arch/arm/boot/dts/imx25-karo-tx25.dts
> index 0950eb66d3d9..57d5ade5aa46 100644
> --- a/arch/arm/boot/dts/imx25-karo-tx25.dts
> +++ b/arch/arm/boot/dts/imx25-karo-tx25.dts
> @@ -39,46 +39,46 @@ memory at 80000000 {
>  &iomuxc {
>  	pinctrl_uart1: uart1grp {
>  		fsl,pins = <
> -			MX25_PAD_UART1_TXD__UART1_TXD 0x80000000
> -			MX25_PAD_UART1_RXD__UART1_RXD 0x80000000
> -			MX25_PAD_UART1_CTS__UART1_CTS 0x80000000
> -			MX25_PAD_UART1_RTS__UART1_RTS 0x80000000
> +			MX25_PAD_UART1_TXD__UART1_TXD 0x00000020
> +			MX25_PAD_UART1_RXD__UART1_RXD 0x000000a0
> +			MX25_PAD_UART1_CTS__UART1_CTS 0x00000060
> +			MX25_PAD_UART1_RTS__UART1_RTS 0x000000e0
>  		>;
>  	};
>  
>  	pinctrl_fec: fecgrp {
>  		fsl,pins = <
> -			MX25_PAD_D11__GPIO_4_9		0x80000000 /* FEC PHY power on pin */
> -			MX25_PAD_D13__GPIO_4_7		0x80000000 /* FEC reset */
> -			MX25_PAD_FEC_MDC__FEC_MDC	0x80000000
> -			MX25_PAD_FEC_MDIO__FEC_MDIO	0x80000000
> -			MX25_PAD_FEC_TDATA0__FEC_TDATA0	0x80000000
> -			MX25_PAD_FEC_TDATA1__FEC_TDATA1	0x80000000
> -			MX25_PAD_FEC_TX_EN__FEC_TX_EN	0x80000000
> -			MX25_PAD_FEC_RDATA0__FEC_RDATA0	0x80000000
> -			MX25_PAD_FEC_RDATA1__FEC_RDATA1	0x80000000
> -			MX25_PAD_FEC_RX_DV__FEC_RX_DV	0x80000000
> -			MX25_PAD_FEC_TX_CLK__FEC_TX_CLK	0x80000000
> +			MX25_PAD_D11__GPIO_4_9		0x00000021 /* FEC PHY power on pin */
> +			MX25_PAD_D13__GPIO_4_7		0x000000a1 /* FEC reset */
> +			MX25_PAD_FEC_MDC__FEC_MDC	0x00000060
> +			MX25_PAD_FEC_MDIO__FEC_MDIO	0x000001f0
> +			MX25_PAD_FEC_TDATA0__FEC_TDATA0	0x00000060
> +			MX25_PAD_FEC_TDATA1__FEC_TDATA1	0x00000060
> +			MX25_PAD_FEC_TX_EN__FEC_TX_EN	0x00000060
> +			MX25_PAD_FEC_RDATA0__FEC_RDATA0	0x000000c1
> +			MX25_PAD_FEC_RDATA1__FEC_RDATA1	0x000000c0
> +			MX25_PAD_FEC_RX_DV__FEC_RX_DV	0x000000c0
> +			MX25_PAD_FEC_TX_CLK__FEC_TX_CLK	0x000000c0
>  		>;
>  	};
>  
>  	pinctrl_nfc: nfcgrp {
>  		fsl,pins = <
> -			MX25_PAD_NF_CE0__NF_CE0		0x80000000
> +			MX25_PAD_NF_CE0__NF_CE0		0x00000001
>  			MX25_PAD_NFWE_B__NFWE_B		0x80000000
>  			MX25_PAD_NFRE_B__NFRE_B		0x80000000
>  			MX25_PAD_NFALE__NFALE		0x80000000
>  			MX25_PAD_NFCLE__NFCLE		0x80000000
>  			MX25_PAD_NFWP_B__NFWP_B		0x80000000

One thing I forgot to point out: I didn't touch these values because the
respective pins don't have a padctrl register. I wonder if these should
be 0x00000000 for consistency? Someone has a strong opinion here?

Best regards
Uwe

-- 
Pengutronix e.K.                           | Uwe Kleine-König            |
Industrial Linux Solutions                 | https://www.pengutronix.de/ |
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