[PATCH v2 4/8] iommu/arm-smmu-v3: move stall_enabled to the cd table
Nicolin Chen
nicolinc at nvidia.com
Mon Jul 31 21:52:29 PDT 2023
On Mon, Jul 31, 2023 at 09:28:40PM -0700, Nicolin Chen wrote:
> On Mon, Jul 31, 2023 at 06:48:14PM +0800, Michael Shavit wrote:
> > This controls whether CD entries will have the stall bit set when
> > writing entries into the table.
> >
> > Signed-off-by: Michael Shavit <mshavit at google.com>
> > ---
> >
> > Changes in v2:
> > - Use a bitfield instead of a bool for stall_enabled
> >
> > drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 8 ++++----
> > drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h | 3 ++-
> > 2 files changed, 6 insertions(+), 5 deletions(-)
> >
> > diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
> > index 8a286e3838d70..654acf6002bf3 100644
> > --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
> > +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
> > @@ -1114,7 +1114,7 @@ int arm_smmu_write_ctx_desc(struct arm_smmu_domain *smmu_domain, int ssid,
> > FIELD_PREP(CTXDESC_CD_0_ASID, cd->asid) |
> > CTXDESC_CD_0_V;
> >
> > - if (smmu_domain->stall_enabled)
> > + if (smmu_domain->cd_table.stall_enabled)
> > val |= CTXDESC_CD_0_S;
>
> This cd_table->stall_enabled comes from master->stall_enabled, and
> cd_table will be in master structure. Also, struct arm_smmu_master
> pointer will be passed in to arm_smmu_write_ctx_desc(). So, there
> seems to be no need of master->cd_table.stall_enabled in the end;
> just use master->stall_enabled directly?
Actually the stall_enabled might still need to be per-CD/domain.
If a domain is attached by two masters. The domain->stall_enabled
is initialized with the first master->stall_enabled. Then, the
second master->stall_enabled would be required to match with the
domain->stall_enabled. arm_smmu_attach_dev() has such a sanity.
So, I think we might not need this patch.
Nicolin
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