[PATCH 1/4] dmaengine: xilinx: xdma: Fix interrupt vector setting
Lizhi Hou
lizhi.hou at amd.com
Mon Jul 31 16:33:27 PDT 2023
On 7/31/23 03:14, Miquel Raynal wrote:
> A couple of hardware registers need to be set to reflect which
> interrupts have been allocated to the device. Each register is 32-bit
> wide and can receive four 8-bit values. If we provide any other interrupt
> number than four, the irq_num variable will never be 0 within the while
> check and the while block will loop forever.
>
> There is an easy way to prevent this: just break the for loop
> when we reach "irq_num == 0", which anyway means all interrupts have
> been processed.
>
> Cc: stable at vger.kernel.org
> Fixes: 17ce252266c7 ("dmaengine: xilinx: xdma: Add xilinx xdma driver")
> Signed-off-by: Miquel Raynal <miquel.raynal at bootlin.com>
> ---
> drivers/dma/xilinx/xdma.c | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/drivers/dma/xilinx/xdma.c b/drivers/dma/xilinx/xdma.c
> index 93ee298d52b8..359123526dd0 100644
> --- a/drivers/dma/xilinx/xdma.c
> +++ b/drivers/dma/xilinx/xdma.c
> @@ -668,6 +668,8 @@ static int xdma_set_vector_reg(struct xdma_device *xdev, u32 vec_tbl_start,
> val |= irq_start << shift;
> irq_start++;
> irq_num--;
> + if (!irq_num)
> + break;
Thanks for fixing this.
Acked-by: Lizhi Hou <lizhi.hou at amd.com>
Lizhi
> }
>
> /* write IRQ register */
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