[PATCH 4/4] arm64: tlb: set huge page size to stride for hugepage
Catalin Marinas
catalin.marinas at arm.com
Mon Jul 31 04:11:34 PDT 2023
On Mon, Jul 31, 2023 at 03:48:29PM +0800, Kefeng Wang wrote:
> +/*
> + * We cannot use leaf-only invalidation here, since we may be invalidating
> + * table entries as part of collapsing hugepages or moving page tables.
> + * Set the tlb_level to 0 because we can not get enough information here.
> + */
> +#define flush_tlb_range(vma, start, end) \
> + __flush_tlb_range(vma, start, end, \
> + ((vma)->vm_flags & VM_HUGETLB) \
> + ? huge_page_size(hstate_vma(vma)) \
> + : PAGE_SIZE, false, 0)
This won't work if we use the contiguous PTE to get 64K hugetlb pages on
a 4K base page configuration. The 16 base pages in the range would have
to be invalidated individually (the contig PTE bit is just a hint, the
hardware may or may not take it into account).
--
Catalin
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