[PATCH -mm] arm64: tlbflush: Add some comments for TLB batched flushing

[Catalin Marinas]

On Sat, Jul 29, 2023 at 09:14:48PM +0800, Yicong Yang wrote:
> diff --git a/arch/arm64/include/asm/tlbflush.h b/arch/arm64/include/asm/tlbflush.h
> index 3456866c6a1d..2bad230b95b4 100644
> --- a/arch/arm64/include/asm/tlbflush.h
> +++ b/arch/arm64/include/asm/tlbflush.h
> @@ -300,11 +300,26 @@ static inline void arch_tlbbatch_add_pending(struct arch_tlbflush_unmap_batch *b
>  	__flush_tlb_page_nosync(mm, uaddr);
>  }
>  
> +/*
> + * If mprotect/munmap/etc occurs during TLB batched flushing, we need to
> + * synchronise all the TLBI issued by a DSB to avoid the race mentioned in

Nitpick: s/by a DSB/with a DSB/ as it somehow reads that the DSB issued
the TLBI.

Since the rest of the series went in via the mm tree, I assume Andrew
will pick this up as well.

Reviewed-by: Catalin Marinas <catalin.marinas at arm.com>

Thanks.