[PATCH v3 4/4] arm64: dts: freescale: Add support for LX2162 SoM & Clearfog Board

[Shawn Guo]

On Sun, Jul 23, 2023 at 12:37:38PM +0200, Josua Mayer wrote:
> Hi Shawn,
> 
> Thank you for reviewing.
> 
> Note I have added a general question inline below.
> 
> Am 18.07.23 um 04:46 schrieb Shawn Guo:
> > On Mon, Jun 19, 2023 at 12:00:26PM +0300, Josua Mayer wrote:
> > > Add support for the SolidRun LX2162A System on Module (SoM), and the
> > > Clearfog evaluation board.
> 
> > > +&dpmac11 {
> > > +	status = "okay";
> > We generally end property list with 'status'.
> Okay, I will change the order for v4.
> > 
> > Shawn
> > 
> > > +	phys = <&serdes_2 0>;
> > > +	phy-handle = <&ethernet_phy2>;
> > > +	phy-connection-type = "sgmii";
> > > +};
> > > +
> > > +&emdio1 {
> > > +	/*
> > > +	 * SoM has a phy at address 1 connected to SoC Ethernet Controller 1.
> > > +	 * It competes for WRIOP MAC17, and no connector has been wired.
> > > +	 */
> > > +	/delete-node/ ethernet-phy at 1;
> Perhaps somebody can help here on what is best practice:
> As outlined in the comment the SoM includes an ethernet phy at address 1,
> which is not used at all by the Clearfog carrier.
> 
> What is the best practice for unused but available components?

If you are saying the connector is not wired on Clearfog, it might make
more sense to give it a disabled status in clearfog dts, IMO.

Shawn

> 
> The phy can still communicate on mdio - just it will never receive rgmii
> signals from ether cpu or carrier.
> I am leaning towards just keeping it with status okay, if only for the
> prospect that a smart driver might put it in a power-saving mode.
> 
> > > +
> > > +	ethernet_phy0: ethernet-phy at 8 {
> > > +		compatible = "ethernet-phy-ieee802.3-c45";
> > > +		reg = <8>;
> > > +		max-speed = <1000>;
> > > +	};
> > > +