[PATCH v5 4/5] perf jevents: Add support for Arm CMN PMU aliasing

[John Garry]

On 28/07/2023 07:17, Jing Zhang wrote:
> Currently just add aliases for part of Arm CMN PMU events which are
> general and compatible for any SoC and CMN-ANY.
> 
> "Compat" value "434*;436*;43c*;43a*" means it is compatible with all

As mentioned in patch 1/5, a comma-separated list seems a better 
delimiter to me

> CMN600/CMN650/CMN700/Ci700.

It would be good if you could provide a link to where you got these 
events. I think that it is the publicly available CMN TRM document.

> 
> Signed-off-by: Jing Zhang<renyu.zj at linux.alibaba.com>

Apart from comments, above:

Reviewed-by: John Garry <john.g.garry at oracle.com>