[RFC v2 11/11] ARM: dts: stm32: add dfsdm iio support on stm32mp157c-ev
Olivier Moysan
olivier.moysan at foss.st.com
Thu Jul 27 08:03:22 PDT 2023
This DT is an example of backend iio device used for STM32 DFSDM.
DFSDM filter1 has a single input channel, while filter0 is configured
to support scan mode with two input channels.
Signed-off-by: Olivier Moysan <olivier.moysan at foss.st.com>
---
arch/arm/boot/dts/st/stm32mp157c-ev1.dts | 68 ++++++++++++++++++++++++
1 file changed, 68 insertions(+)
diff --git a/arch/arm/boot/dts/st/stm32mp157c-ev1.dts b/arch/arm/boot/dts/st/stm32mp157c-ev1.dts
index af3800501875..edeac26f39a4 100644
--- a/arch/arm/boot/dts/st/stm32mp157c-ev1.dts
+++ b/arch/arm/boot/dts/st/stm32mp157c-ev1.dts
@@ -73,6 +73,27 @@ panel_backlight: panel-backlight {
default-on;
status = "okay";
};
+
+ sd_adc0: sd-adc0 {
+ compatible = "sd-modulator";
+ #io-backend-cells = <0>;
+ vref-supply = <&v3v3>;
+ status = "okay";
+ };
+
+ sd_adc1: sd-adc1 {
+ compatible = "sd-modulator";
+ #io-backend-cells = <0>;
+ vref-supply = <&v3v3>;
+ status = "okay";
+ };
+
+ sd_adc2: sd-adc2 {
+ compatible = "sd-modulator";
+ #io-backend-cells = <0>;
+ vref-supply = <&v3v3>;
+ status = "okay";
+ };
};
&cec {
@@ -99,6 +120,53 @@ dcmi_0: endpoint {
};
};
+&dfsdm {
+ pinctrl-names = "default", "sleep";
+ pinctrl-0 = <&dfsdm_clkout_pins_a
+ &dfsdm_data1_pins_a &dfsdm_data3_pins_a>;
+ pinctrl-1 = <&dfsdm_clkout_sleep_pins_a
+ &dfsdm_data1_sleep_pins_a &dfsdm_data3_sleep_pins_a>;
+ spi-max-frequency = <2048000>;
+ status = "okay";
+
+ dfsdm0: filter at 0 {
+ compatible = "st,stm32-dfsdm-adc";
+ st,filter-order = <3>;
+ status = "okay";
+
+ channel at 0 {
+ reg = <0>;
+ label = "in0";
+ st,adc-channel-types = "SPI_F";
+ st,adc-channel-clk-src = "CLKOUT";
+ st,adc-alt-channel;
+ io-backends = <&sd_adc0>;
+ };
+
+ channel at 1 {
+ reg = <1>;
+ label = "in1";
+ st,adc-channel-types = "SPI_R";
+ st,adc-channel-clk-src = "CLKOUT";
+ io-backends = <&sd_adc1>;
+ };
+ };
+
+ dfsdm1: filter at 1 {
+ compatible = "st,stm32-dfsdm-adc";
+ st,filter-order = <3>;
+ status = "okay";
+
+ channel at 3 {
+ reg = <3>;
+ label = "in3";
+ st,adc-channel-types = "SPI_R";
+ st,adc-channel-clk-src = "CLKOUT";
+ io-backends = <&sd_adc2>;
+ };
+ };
+};
+
&dsi {
phy-dsi-supply = <®18>;
#address-cells = <1>;
--
2.25.1
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