[PATCH v2 07/11] bus: rifsc: introduce RIFSC firewall controller driver

[Gatien CHEVALLIER]

On 7/26/23 12:26, Simon Horman wrote:
> On Tue, Jul 25, 2023 at 06:41:00PM +0200, Gatien Chevallier wrote:
> 
> ...
> 
>> diff --git a/drivers/bus/stm32_rifsc.c b/drivers/bus/stm32_rifsc.c
> 
> ...
> 
>> +static int stm32_rif_acquire_semaphore(struct stm32_firewall_controller *stm32_firewall_controller,
>> +				       int id)
>> +{
>> +	void __iomem *addr = stm32_firewall_controller->mmio + RIFSC_RISC_PER0_SEMCR + 0x8 * id;
>> +
>> +	__set_bit(SEMCR_MUTEX, addr);
> 
> Hi Gatien,
> 
> Sparse seem a bit unhappy about this.
> 
>   .../stm32_rifsc.c:83:9: warning: cast removes address space '__iomem' of expression
>   .../stm32_rifsc.c:83:9: warning: incorrect type in argument 2 (different address spaces)
>   .../stm32_rifsc.c:83:9:    expected unsigned long volatile *addr
>   .../stm32_rifsc.c:83:9:    got void [noderef] __iomem *addr
>   .../stm32_rifsc.c:83:9: warning: incorrect type in argument 2 (different address spaces)
>   .../stm32_rifsc.c:83:9:    expected unsigned long volatile *addr
>   .../stm32_rifsc.c:83:9:    got void [noderef] __iomem *addr
> 
> But it's not immediately apparent to me what a good solution is.
> 

Hi Simon,

This is indeed incorrect, set_bit is used to modify bit fields, not
writing to a register. I'll change to writel, as in
stm32_rif_release_semaphore(). Thank you for pointing this out.

Best regards,
Gatien
>> +
>> +	/* Check that CID1 has the semaphore */
>> +	if (stm32_rifsc_is_semaphore_available(addr) ||
>> +	    FIELD_GET(RIFSC_RISC_SCID_MASK, readl(addr)) != RIF_CID1)
>> +		return -EACCES;
>> +
>> +	return 0;
>> +}
> 
> ...