[PATCH v5 2/6] dt-bindings: phy: qcom,m31: Document qcom,m31 USB phy

[Rob Herring]

On Fri, Jul 21, 2023 at 10:10:57PM -0700, Bjorn Andersson wrote:
> On Fri, Jul 21, 2023 at 10:05:27AM +0530, Varadarajan Narayanan wrote:
> > Document the M31 USB2 phy present in IPQ5332.
> > 
> > Signed-off-by: Sricharan Ramabadhran <quic_srichara at quicinc.com>
> 
> As Sricharan is the first one to certify the patch's origin, it seems
> likely that he's the author. Please add a Co-developed-by: Sricharan.
> 
> [..]
> > diff --git a/Documentation/devicetree/bindings/phy/qcom,ipq5332-usb-hsphy.yaml b/Documentation/devicetree/bindings/phy/qcom,ipq5332-usb-hsphy.yaml
> > new file mode 100644
> > index 0000000..e0b282b
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/phy/qcom,ipq5332-usb-hsphy.yaml
> > @@ -0,0 +1,51 @@
> > +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
> > +%YAML 1.2
> > +---
> > +$id: http://devicetree.org/schemas/phy/qcom,ipq5332-usb-hsphy.yaml#
> > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > +
> > +title: M31 USB PHY
> > +
> > +maintainers:
> > +  - Sricharan Ramabadhran <quic_srichara at quicinc.com>
> > +  - Varadarajan Narayanan <quic_varada at quicinc.com>
> > +
> > +description:
> > +  USB M31 PHY (https://www.m31tech.com) found in Qualcomm
> > +  IPQ5018, IPQ5332 SoCs.
> > +
> > +properties:
> > +  "#phy-cells":
> > +    const: 0
> > +
> > +  compatible:
> > +    enum:
> 
> const?
> 
> > +      - qcom,ipq5332-usb-hsphy
> > +
> > +  reg:
> > +    maxItems: 1
> > +
> > +  clocks:
> > +    maxItems: 1
> > +
> > +  clock-names:
> > +    items:
> > +      - const: cfg_ahb
> > +
> > +  resets:
> > +    maxItems: 1
> > +
> > +additionalProperties: false
> > +
> > +examples:
> > +  - |
> > +    #include <dt-bindings/clock/qcom,ipq5332-gcc.h>
> > +    usbphy0: usb-phy at 7b000 {
> 
> usb@

You mean phy@? But 'usb2-phy' is accepted too.

> 
> And you don't need to give the node a label in the example.
> 
> > +        compatible = "qcom,ipq5332-usb-hsphy";
> > +        reg = <0x0007b000 0x12c>;
> > +
> > +        clocks = <&gcc GCC_USB0_PHY_CFG_AHB_CLK>;
> > +        clock-names = "cfg_ahb";
> > +
> 
> No #phy-cells?
> 
> Regards,
> Bjorn
> 
> > +        resets = <&gcc GCC_QUSB2_0_PHY_BCR>;
> > +    };
> > -- 
> > 2.7.4
> >