[PATCH] arm64: zynqmp: Fix dwc3 usb interrupt description

[Michal Simek]

On 6/21/23 16:13, Laurent Pinchart wrote:
> Hi Michal,
> 
> Thank you for the patch.
> 
> On Mon, Jun 19, 2023 at 09:37:54AM +0200, Michal Simek wrote:
>> Based on DT binding dwc_usb3 is single entry without anything else. That's
>> why combination dwc3_usb3, otg is not allowed. That's why split it to host
>> and peripheral pair which both points to the same IRQ.
>> DWC3 code is reading these two properties first before generic dwc_usb3.
>>
>> Signed-off-by: Michal Simek <michal.simek at amd.com>
>> ---
>>
>>   arch/arm64/boot/dts/xilinx/zynqmp.dtsi | 8 ++++----
>>   1 file changed, 4 insertions(+), 4 deletions(-)
>>
>> diff --git a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
>> index 02cfcc716936..e8104ffc6663 100644
>> --- a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
>> +++ b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
>> @@ -888,8 +888,8 @@ dwc3_0: usb at fe200000 {
>>   				compatible = "snps,dwc3";
>>   				reg = <0x0 0xfe200000 0x0 0x40000>;
>>   				interrupt-parent = <&gic>;
>> -				interrupt-names = "dwc_usb3", "otg";
>> -				interrupts = <0 65 4>, <0 69 4>;
>> +				interrupt-names = "host", "peripheral", "otg";
>> +				interrupts = <0 65 4>, <0 65 4>, <0 69 4>;
> 
> This should read
> 
> 				interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>,
> 					     <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>,
> 					     <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
> 
> The issue isn't introduced by this patch, so it should probably be fixed
> by a separate patch on top, to convert the whole zynqmp.dtsi file. Do
> you have any plan to do so, or should I ?

I have sent it here.
https://lore.kernel.org/r/9d5bd17f37772be186cab17b06cc21351d36ff62.1688986332.git.michal.simek@amd.com

Feel free to review it.

Thanks,
Michal