[PATCH 1/1] arm64: dts: imx8mp: remove arm, primecell-periphid at etm nodes

[Alexander Stein]

Hi Frank,

Am Mittwoch, 5. Juli 2023, 22:59:53 CEST schrieb Frank Li:
> The reg size of etm nodes is incorrectly set to 64k instead of 4k. This
> leads to a crash when calling amba_read_periphid().  After corrected reg
> size, amba_read_periphid() retrieve the correct periphid.
> arm,primecell-periphid were removed from the etm nodes.

So this means the reference manual is wrong here? It clearly states the size 
is 64kiB. Reference Manual i.MX8MP Rev 1. 06/2021
On a side note: Is imx8mq affected by this as well? The DAP memory table lists 
similar sizes in the RM .

Best regards,
Alexander

> Signed-off-by: Frank Li <Frank.Li at nxp.com>
> ---
>  arch/arm64/boot/dts/freescale/imx8mp.dtsi | 12 ++++--------
>  1 file changed, 4 insertions(+), 8 deletions(-)
> 
> diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> b/arch/arm64/boot/dts/freescale/imx8mp.dtsi index
> cc406bb338fe..e0ca82ff6f15 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> @@ -306,8 +306,7 @@ soc: soc at 0 {
> 
>  		etm0: etm at 28440000 {
>  			compatible = "arm,coresight-etm4x", 
"arm,primecell";
> -			reg = <0x28440000 0x10000>;
> -			arm,primecell-periphid = <0xbb95d>;
> +			reg = <0x28440000 0x1000>;
>  			cpu = <&A53_0>;
>  			clocks = <&clk IMX8MP_CLK_MAIN_AXI>;
>  			clock-names = "apb_pclk";
> @@ -323,8 +322,7 @@ etm0_out_port: endpoint {
> 
>  		etm1: etm at 28540000 {
>  			compatible = "arm,coresight-etm4x", 
"arm,primecell";
> -			reg = <0x28540000 0x10000>;
> -			arm,primecell-periphid = <0xbb95d>;
> +			reg = <0x28540000 0x1000>;
>  			cpu = <&A53_1>;
>  			clocks = <&clk IMX8MP_CLK_MAIN_AXI>;
>  			clock-names = "apb_pclk";
> @@ -340,8 +338,7 @@ etm1_out_port: endpoint {
> 
>  		etm2: etm at 28640000 {
>  			compatible = "arm,coresight-etm4x", 
"arm,primecell";
> -			reg = <0x28640000 0x10000>;
> -			arm,primecell-periphid = <0xbb95d>;
> +			reg = <0x28640000 0x1000>;
>  			cpu = <&A53_2>;
>  			clocks = <&clk IMX8MP_CLK_MAIN_AXI>;
>  			clock-names = "apb_pclk";
> @@ -357,8 +354,7 @@ etm2_out_port: endpoint {
> 
>  		etm3: etm at 28740000 {
>  			compatible = "arm,coresight-etm4x", 
"arm,primecell";
> -			reg = <0x28740000 0x10000>;
> -			arm,primecell-periphid = <0xbb95d>;
> +			reg = <0x28740000 0x1000>;
>  			cpu = <&A53_3>;
>  			clocks = <&clk IMX8MP_CLK_MAIN_AXI>;
>  			clock-names = "apb_pclk";


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