[PATCH] drivers/perf: pmuv3: don't expose SW_INCR event in sysfs
Will Deacon
will at kernel.org
Tue Dec 5 07:16:30 PST 2023
On Mon, 4 Dec 2023 11:58:47 +0000, Mark Rutland wrote:
> The SW_INCR event is somewhat unusual, and depends on the specific HW
> counter that it is programmed into. When programmed into PMEVCNTR<n>,
> SW_INCR will count any writes to PMSWINC_EL0 with bit n set, ignoring
> writes to SW_INCR with bit n clear.
>
> Event rotation means that there's no fixed relationship between
> perf_events and HW counters, so this isn't all that useful.
>
> [...]
Applied to will (for-next/perf), thanks!
[1/1] drivers/perf: pmuv3: don't expose SW_INCR event in sysfs
https://git.kernel.org/will/c/ca6f537e459e
Cheers,
--
Will
https://fixes.arm64.dev
https://next.arm64.dev
https://will.arm64.dev
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