[PATCH V4 2/2] dt-bindings: cpufreq: Convert ti-cpufreq to json schema

[Dhruva Gole]

On Aug 10, 2023 at 22:14:58 -0500, Nishanth Menon wrote:
> Move the ti-cpufreq binding over to opp and convert the free text
> binding to json-schema.
> 
> Signed-off-by: Nishanth Menon <nm at ti.com>
> ---
> Changes since V3:
> * Rewrote the description of the binding to something more relevant to
>   current style of documentation.
> * Due to the rewrite in description, I have dropped Dhruva's
>   Reviewed-by.

OK

> 
> V3: https://lore.kernel.org/all/20230809023045.1870410-3-nm@ti.com/
> V2: https://lore.kernel.org/all/20230801233341.1416552-3-nm@ti.com
> V1: https://lore.kernel.org/all/20230724153911.1376830-6-nm@ti.com/
> 
>  .../bindings/cpufreq/ti-cpufreq.txt           | 132 ------------------
>  .../opp/operating-points-v2-ti-cpu.yaml       |  92 ++++++++++++
>  2 files changed, 92 insertions(+), 132 deletions(-)
>  delete mode 100644 Documentation/devicetree/bindings/cpufreq/ti-cpufreq.txt
>  create mode 100644 Documentation/devicetree/bindings/opp/operating-points-v2-ti-cpu.yaml
> 
[...]
> diff --git a/Documentation/devicetree/bindings/opp/operating-points-v2-ti-cpu.yaml b/Documentation/devicetree/bindings/opp/operating-points-v2-ti-cpu.yaml
> new file mode 100644
> index 000000000000..02d1d2c17129
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/opp/operating-points-v2-ti-cpu.yaml
> @@ -0,0 +1,92 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/opp/operating-points-v2-ti-cpu.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: TI CPU OPP (Operating Performance Points)
> +
> +description:
> +  TI SoCs, like those in the AM335x, AM437x, AM57xx, AM62x, and DRA7xx
> +  families, the CPU frequencies subset and the voltage value of each
> +  OPP vary based on the silicon variant used. The data sheet sections
> +  corresponding to "Operating Performance Points" describe the frequency
> +  and voltage values based on device type and speed bin information
> +  blown in corresponding eFuse bits as referred to by the Technical
> +  Reference Manual.
> +
> +  This document extends the operating-points-v2 binding by providing
> +  the hardware description for the scheme mentioned above.
> +
[...]


Thanks for addressing my comments,

Reviewed-by: Dhruva Gole <d-gole at ti.com>

-- 
Best regards,
Dhruva Gole <d-gole at ti.com>