[PATCH] arm64: dts: imx8mm: Model PMIC to SNVS RTC clock path on Data Modul i.MX8M Mini eDM SBC

[Tim Harvey]

On Sat, Sep 24, 2022 at 10:47 AM Marek Vasut <marex at denx.de> wrote:
>
> The PMIC is the 32 kHz clock source for the RTC_XTALI input of the SoC
> on this system. The RTC_XTALI input is used to supply 32 kHz clock to
> the SVNS RTC per "i.MX 8M Mini Applications Processor Reference Manual,
> Rev. 3, 11/2020" page 759 "The 32KHz XTAL module uses a different IP and
> it is used as the clock source for the RTC, located in the SNVS." The
> PMIC has its own dedicated 32 kHz XTAL on input.
>
> Model the connection in DT.
>
> Signed-off-by: Marek Vasut <marex at denx.de>
> ---
> Cc: Fabio Estevam <festevam at denx.de>
> Cc: NXP Linux Team <linux-imx at nxp.com>
> Cc: Peng Fan <peng.fan at nxp.com>
> Cc: Shawn Guo <shawnguo at kernel.org>
> To: linux-arm-kernel at lists.infradead.org
> ---
>  .../dts/freescale/imx8mm-data-modul-edm-sbc.dts     | 13 +++++++++++++
>  1 file changed, 13 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/freescale/imx8mm-data-modul-edm-sbc.dts b/arch/arm64/boot/dts/freescale/imx8mm-data-modul-edm-sbc.dts
> index 6ff30cbb32fb2..575d5632296c5 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mm-data-modul-edm-sbc.dts
> +++ b/arch/arm64/boot/dts/freescale/imx8mm-data-modul-edm-sbc.dts
> @@ -53,6 +53,12 @@ clk_xtal25: clk-xtal25 {
>                 clock-frequency = <25000000>;
>         };
>
> +       clk_xtal32k: clk-xtal32k {
> +               compatible = "fixed-clock";
> +               #clock-cells = <0>;
> +               clock-frequency = <32768>;
> +       };
> +
>         panel: panel {
>                 backlight = <&backlight>;
>                 power-supply = <&reg_panel_vcc>;
> @@ -276,6 +282,9 @@ &i2c1 {
>         pmic: pmic at 4b {
>                 compatible = "rohm,bd71847";
>                 reg = <0x4b>;
> +               #clock-cells = <0>;
> +               clocks = <&clk_xtal32k 0>;
> +               clock-output-names = "clk-32k-out";
>                 pinctrl-names = "default";
>                 pinctrl-0 = <&pinctrl_pmic>;
>                 interrupt-parent = <&gpio1>;
> @@ -942,6 +951,10 @@ &sai5 {
>         status = "disabled";
>  };
>
> +&snvs_rtc {
> +       clocks = <&pmic>;
> +};
> +
>  &uart1 {
>         pinctrl-names = "default";
>         pinctrl-0 = <&pinctrl_uart1>;
> --
> 2.35.1
>
>

Marek,

The modeling here makes sense, but I tried this on the boards I have
with the rohm,bd71847 and it did not bump the clk_enable_count for
clk-32k-out and thus drivers/clk/clk-bd718x7.c still disables the
clock. Is something else required to make that happen?

Best Regards,

Tim