[PATCH] clocksource/drivers/arm_arch_timer: Fix CNTPCT_LO and CNTVCT_LO value

[Shaokun Zhang]

Hi Marc,

在 2022/9/26 20:46, Marc Zyngier 写道:
> On Mon, 26 Sep 2022 07:30:03 -0400,
> Shaokun Zhang <zhangshaokun at hisilicon.com> wrote:
> 
> Please Cc the clocksource maintainers (now added) so that they know
> what is going on.
> 

Oops，I only Cced Mark and you and will add the two in V2.

>>
>> From: Yang Guo <guoyang2 at huawei.com>
>>
>> CNTPCT_LO and CNTVCT_LO are defined by mistake in commit '8b82c4f883a7',
>> so fix them according to the Arm ARM as follows:
> 
> Please quote the location of the information: DDi 0487I.a, Table I2-4
> "CNTBaseN memory map"
> 

Sure.

>>
>> Offset    Register      Type Description
>> 0x000     CNTPCT[31:0]  RO   Physical Count register.
>> 0x004     CNTPCT[63:32] RO
>> 0x008     CNTVCT[31:0]  RO   Virtual Count register.
>> 0x00C     CNTVCT[63:32] RO
>>
>> Fixes: 8b82c4f883a7 ("clocksource/drivers/arm_arch_timer: Move MMIO timer programming over to CVAL")
> 
> Cc: stable at vger.kernel.org
> 

It's was introduced in Linux 5.16, Shall I Cc stable?

>> Cc: Marc Zyngier <maz at kernel.org>
>> Cc: Mark Rutland <mark.rutland at arm.com>
>> Signed-off-by: Yang Guo <guoyang2 at huawei.com>
>> Signed-off-by: Shaokun Zhang <zhangshaokun at hisilicon.com>
> 
> With the above:
> 
> Acked-by: Marc Zyngier <maz at kernel.org>
> 

Thanks Marc,
Shaokun

> 	M.
>