Why GICD_ITARGETSR is not used by Linux

[Russell King (Oracle)]

On Tue, Sep 20, 2022 at 05:37:15PM +0200, Li Chen wrote:
> Hi Russell,
> 
>  ---- On Tue, 20 Sep 2022 12:09:38 +0200  Russell King (Oracle)  wrote --- 
>  > On ARM, we don't have that. We have a thundering herd of CPUs if we
>  > set more than one CPU to process the interrupt, which is grossly
>  > inefficient.
> 
> So, on arm chips with PCIe controller(s), we also rely on irqbalance to 
> distribute endpoints' legacy irq/MSI/MSIx?

I think irqbalance 1.x was functional for all IRQs, not just PCIe.
However, yes, doing it in userspace at this point is the best
solution anyway, IMHO, as it is possible to create whatever policies
one desires there - and what works for one workload may not be good
for another workload.

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