[RFC V3 PATCH 0/8] Xilinx DMA enhancements and optimization
Sarath Babu Naidu Gaddam
sarath.babu.naidu.gaddam at amd.com
Mon Sep 19 22:51:11 PDT 2022
Some background about the patch series: Xilinx Axi Ethernet device driver
(xilinx_axienet_main.c) currently has axi-dma code inside it. The goal is
to refactor axiethernet driver and use existing AXI DMA driver using
DMAEngine API.
This patchset does feature addition and optimization to support axidma
integration with axiethernet network driver. Once axidma version is
accepted mcdma specific changes will be added in followup version.
Changes for V2:
- Use metadata API[1] for passing metadata from dma to netdev client.
- Read irq-delay from DT.
- Remove desc_callback_valid check.
- Addressed RFC v1 comments[2].
- Minor code refactoring.
Changes for V3:
- Add device_config support for passing any dma client data.
- Address RFC v2 comments.
- remove hardcoding for axidma_tx_segment.
- Below review comment is in pipeline. We are facing a race issue when
addressing it. we will fix it in the next version.
"chan->idle = true; in xilinx_dma_irq_handler() needs to be gated on
the active_list being empty".
Comments, suggestions are very welcome
Radhey Shyam Pandey (7):
dt-bindings: dmaengine: xilinx_dma: Add xlnx,axistream-connected
property
dt-bindings: dmaengine: xilinx_dma: Add xlnx,irq-delay property
dmaengine: xilinx_dma: Pass AXI4-Stream control words to dma client
dmaengine: xilinx_dma: Increase AXI DMA transaction segment count
dmaengine: xilinx_dma: Freeup active list based on descriptor
completion bit
dmaengine: xilinx_dma: Use tasklet_hi_schedule for timing critical
usecase
dmaengine: xilinx_dma: Program interrupt delay timeout
Sarath Babu Naidu Gaddam (1):
dmaengine: xilinx_dma: Add device_config support
.../bindings/dma/xilinx/xilinx_dma.txt | 4 +
drivers/dma/xilinx/xilinx_dma.c | 107 ++++++++++++++++--
include/linux/dma/xilinx_dma.h | 16 +++
3 files changed, 115 insertions(+), 12 deletions(-)
--
2.25.1
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