[PATCH v1 0/6] arm64/sysreg: More system register generation

[Catalin Marinas]

On Sat, 10 Sep 2022 17:33:48 +0100, Mark Brown wrote:
> This series converts the last of the 64 bit ID registers to automatic
> generation, James Morse has a pending series which will do the 32 bit
> ones so we will soon be able to start taking advantage of the conversion
> to simplify the CPU feature detection macros.
> 
> Mark Brown (6):
>   arm64/sysreg: Align field names in ID_AA64DFR0_EL1 with architecture
>   arm64/sysreg: Add _EL1 into ID_AA64DFR0_EL1 definition names
>   arm64/sysreg: Use feature numbering for PMU and SPE revisions
>   arm64/sysreg: Convert ID_AA64FDR0_EL1 to automatic generation
>   arm64/sysreg: Convert ID_AA64DFR1_EL1 to automatic generation
>   arm64/sysreg: Convert ID_AA64AFRn_EL1 to automatic generation
> 
> [...]

Applied to arm64 (for-next/sysreg), thanks!

[1/6] arm64/sysreg: Align field names in ID_AA64DFR0_EL1 with architecture
      https://git.kernel.org/arm64/c/c0357a73fa4a
[2/6] arm64/sysreg: Add _EL1 into ID_AA64DFR0_EL1 definition names
      https://git.kernel.org/arm64/c/fcf37b38ff22
[3/6] arm64/sysreg: Use feature numbering for PMU and SPE revisions
      https://git.kernel.org/arm64/c/121a8fc088f1
[4/6] arm64/sysreg: Convert ID_AA64FDR0_EL1 to automatic generation
      https://git.kernel.org/arm64/c/e62a2d2610f0
[5/6] arm64/sysreg: Convert ID_AA64DFR1_EL1 to automatic generation
      https://git.kernel.org/arm64/c/c65c617806ed
[6/6] arm64/sysreg: Convert ID_AA64AFRn_EL1 to automatic generation
      https://git.kernel.org/arm64/c/10453bf149c9

-- 
Catalin