[PATCH v2 1/2] dt-bindings: mailbox: Convert mtk-gce to DT schema
Rob Herring
robh at kernel.org
Fri Sep 16 07:17:03 PDT 2022
On Fri, Sep 16, 2022 at 10:07:41AM +0200, AngeloGioacchino Del Regno wrote:
> Convert the mtk-gce mailbox binding to DT schema format.
>
> Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno at collabora.com>
> ---
>
> A previous attempt for this was made at [1], but it was changing
> the way of getting clocks (by name for all).
> Keeping clock-names not required for the multi-gce case makes this
> binding simpler, hence I chose to abandon the change at [1] and go
> for this one instead.
>
> Any Reviewed-by or Acked-by tag was dropped, as this conversion was
> completely redone from scratch and differs from [1] for the
> aforementioned reasons.
>
> [1]: https://lore.kernel.org/all/20220524151512.247435-1-angelogioacchino.delregno@collabora.com/
>
> .../mailbox/mediatek,gce-mailbox.yaml | 104 ++++++++++++++++++
> .../devicetree/bindings/mailbox/mtk-gce.txt | 82 --------------
> 2 files changed, 104 insertions(+), 82 deletions(-)
> create mode 100644 Documentation/devicetree/bindings/mailbox/mediatek,gce-mailbox.yaml
> delete mode 100644 Documentation/devicetree/bindings/mailbox/mtk-gce.txt
>
> diff --git a/Documentation/devicetree/bindings/mailbox/mediatek,gce-mailbox.yaml b/Documentation/devicetree/bindings/mailbox/mediatek,gce-mailbox.yaml
> new file mode 100644
> index 000000000000..ac6ca7fc5302
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/mailbox/mediatek,gce-mailbox.yaml
> @@ -0,0 +1,104 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/mailbox/mediatek,gce-mailbox.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Mediatek Global Command Engine Mailbox
> +
> +maintainers:
> + - Houlong Wei <houlong.wei at mediatek.com>
> +
> +description: |
Don't need '|' if not formatting to preserve.
> + The Global Command Engine (GCE) is used to help read/write registers with
> + critical time limitation, such as updating display configuration during the
> + vblank. The GCE can be used to implement the Command Queue (CMDQ) driver.
> +
> +properties:
> + compatible:
> + enum:
> + - mediatek,mt6779-gce
> + - mediatek,mt8173-gce
> + - mediatek,mt8183-gce
> + - mediatek,mt8186-gce
> + - mediatek,mt8192-gce
> + - mediatek,mt8195-gce
> +
> + "#mbox-cells":
> + const: 2
> + description:
> + The first cell describes the Thread ID of the GCE,
> + the second cell describes the priority of the GCE thread
> +
> + reg:
> + maxItems: 1
> +
> + interrupts:
> + maxItems: 1
> +
> + clocks:
> + items:
> + - description: Global Command Engine clock
> +
> + clock-names:
> + items:
> + - const: gce
> +
> +required:
> + - compatible
> + - "#mbox-cells"
> + - reg
> + - interrupts
> + - clocks
> +
> +if:
> + not:
> + properties:
> + compatible:
> + contains:
> + const: mediatek,mt8195-gce
> +then:
> + required:
> + - clock-names
> +
> +additionalProperties: false
> +
> +examples:
> + # Example for a device client and for a MediaTek mutex client
> + - |
> + #include <dt-bindings/clock/mt8173-clk.h>
> + #include <dt-bindings/gce/mt8173-gce.h>
> + #include <dt-bindings/interrupt-controller/arm-gic.h>
> + #include <dt-bindings/interrupt-controller/irq.h>
> + #include <dt-bindings/power/mt8173-power.h>
> +
> + gce: mailbox at 12120000 {
> + compatible = "mediatek,mt8173-gce";
> + reg = <0x10816000 0x1000>;
> + interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_LOW>;
> + #mbox-cells = <2>;
> + clocks = <&infracfg CLK_INFRA_GCE>;
> + clock-names = "gce";
> + };
> +
> + syscon at 14000000 {
> + compatible = "mediatek,mt8173-mmsys", "syscon";
> + reg = <0x14000000 0x1000>;
> + power-domains = <&spm MT8173_POWER_DOMAIN_MM>;
> + #clock-cells = <1>;
> + #reset-cells = <1>;
> + mboxes = <&gce 0 CMDQ_THR_PRIO_HIGHEST>,
> + <&gce 1 CMDQ_THR_PRIO_HIGHEST>;
> + mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0 0x1000>;
Provider binding examples don't normally show clients in examples (and
vice-versa). Presumably we already have this in the
"mediatek,mt8173-mmsys" binding.
> + };
> +
> + mutex at 14020000 {
> + compatible = "mediatek,mt8173-disp-mutex";
> + reg = <0x14020000 0x1000>;
> + interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_LOW>;
> + power-domains = <&scpsys MT8173_POWER_DOMAIN_MM>;
> + clocks = <&mmsys CLK_MM_MUTEX_32K>;
> + mediatek,gce-client-reg = <&gce SUBSYS_1402XXXX 0 0x1000>;
> + mediatek,gce-events = <CMDQ_EVENT_MUTEX0_STREAM_EOF>,
> + <CMDQ_EVENT_MUTEX1_STREAM_EOF>;
ditto.
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