[PATCH 3/3] arm64: errata: remove BF16 HWCAP due to incorrect result on Cortex-A510

[James Morse]

Hi Suzuki,

On 12/09/2022 16:30, Suzuki K Poulose wrote:
> On 09/09/2022 17:59, James Morse wrote:
>> Cortex-A510's erratum #2658417 causes two BF16 instructions to return the
>> wrong result in rare circumstances when a pair of A510 CPUs are using
>> shared neon hardware.
>>
>> The two instructions affected are BFMMLA and VMMLA, support for these is
>> indicated by the BF16 HWCAP. Remove it on affected platforms.

>> diff --git a/arch/arm64/kernel/cpu_errata.c b/arch/arm64/kernel/cpu_errata.c
>> index 53b973b6059f..aef3245a8597 100644
>> --- a/arch/arm64/kernel/cpu_errata.c
>> +++ b/arch/arm64/kernel/cpu_errata.c
>> @@ -691,6 +707,17 @@ const struct arm64_cpu_capabilities arm64_errata[] = {
>>           CAP_MIDR_RANGE_LIST(broken_aarch32_aes),
>>           .type = ARM64_CPUCAP_LOCAL_CPU_ERRATUM,
>>       },
>> +#endif
>> +#ifdef CONFIG_ARM64_ERRATUM_2658417
>> +    {
>> +        .desc = "ARM erratum 2658417",
>> +        .capability = ARM64_WORKAROUND_2658417,
>> +        /* Cortex-A510 r0p0 - r1p1 */
>> +        ERRATA_MIDR_RANGE(MIDR_CORTEX_A510, 0, 0, 1, 1),
> 
>> +        MIDR_FIXED(MIDR_CPU_VAR_REV(1,1), BIT(25)),

> nit: Do we need to document this in the Kconfig help text ?

I agree its unusual, but isn't it a special case of "if your hardware isn't broken the
workaround isn't applied"?

Do you think a section on revisions affected in Kconfig really benefits anyone?
Can't they look at the errata document instead? (that is why the erratum number appears in
so many places)


>> +        .type = ARM64_CPUCAP_LOCAL_CPU_ERRATUM,

> nit: type is populated with ERRATA_MIDR_RANGE macro. So this may be
> skipped.

Those macro's are just a jungle!


Thanks,

James