[PATCH v3 net-next 2/2] net: macb: Add zynqmp SGMII dynamic configuration support

[Claudiu.Beznea at microchip.com]

On 14.09.2022 15:33, Radhey Shyam Pandey wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
> 
> Add support for the dynamic configuration which takes care of
> configuring the GEM secure space configuration registers
> using EEMI APIs.
> High level sequence is to:
> - Check for the PM dynamic configuration support, if no error proceed with
>   GEM dynamic configurations(next steps) otherwise skip the dynamic
>   configuration.
> - Configure GEM Fixed configurations.
> - Configure GEM_CLK_CTRL (gemX_sgmii_mode).
> - Trigger GEM reset.
> 
> Signed-off-by: Radhey Shyam Pandey <radhey.shyam.pandey at amd.com>
> Reviewed-by: Andrew Lunn <andrew at lunn.ch>
> Tested-by: Conor Dooley <conor.dooley at microchip.com> (for MPFS)

Reviewed-by: Claudiu Beznea <claudiu.beznea at microchip.com>


> ---
> Changes for v3:
> - Introduce goto for common phy_exit return path.
> - Change return check to if(ret) for of_property_read_u32_array
>   and zynqmp_pm_set_gem_config APIs.
> 
> Changes for v2:
> - Add phy_exit() in error return paths.
> ---
>  drivers/net/ethernet/cadence/macb_main.c | 22 ++++++++++++++++++++++
>  1 file changed, 22 insertions(+)
> 
> diff --git a/drivers/net/ethernet/cadence/macb_main.c b/drivers/net/ethernet/cadence/macb_main.c
> index 66c7d08d376a..4769c8a0c73a 100644
> --- a/drivers/net/ethernet/cadence/macb_main.c
> +++ b/drivers/net/ethernet/cadence/macb_main.c
> @@ -38,6 +38,7 @@
>  #include <linux/pm_runtime.h>
>  #include <linux/ptp_classify.h>
>  #include <linux/reset.h>
> +#include <linux/firmware/xlnx-zynqmp.h>
>  #include "macb.h"
> 
>  /* This structure is only used for MACB on SiFive FU540 devices */
> @@ -4621,6 +4622,25 @@ static int init_reset_optional(struct platform_device *pdev)
>                                              "failed to init SGMII PHY\n");
>         }
> 
> +       ret = zynqmp_pm_is_function_supported(PM_IOCTL, IOCTL_SET_GEM_CONFIG);
> +       if (!ret) {
> +               u32 pm_info[2];
> +
> +               ret = of_property_read_u32_array(pdev->dev.of_node, "power-domains",
> +                                                pm_info, ARRAY_SIZE(pm_info));
> +               if (ret) {
> +                       dev_err(&pdev->dev, "Failed to read power management information\n");
> +                       goto err_out_phy_exit;
> +               }
> +               ret = zynqmp_pm_set_gem_config(pm_info[1], GEM_CONFIG_FIXED, 0);
> +               if (ret)
> +                       goto err_out_phy_exit;
> +
> +               ret = zynqmp_pm_set_gem_config(pm_info[1], GEM_CONFIG_SGMII_MODE, 1);
> +               if (ret)
> +                       goto err_out_phy_exit;
> +       }
> +
>         /* Fully reset controller at hardware level if mapped in device tree */
>         ret = device_reset_optional(&pdev->dev);
>         if (ret) {
> @@ -4629,6 +4649,8 @@ static int init_reset_optional(struct platform_device *pdev)
>         }
> 
>         ret = macb_init(pdev);
> +
> +err_out_phy_exit:
>         if (ret)
>                 phy_exit(bp->sgmii_phy);
> 
> --
> 2.25.1
>