[GIT PULL] i.MX fixes for 6.0, 2nd round

[Shawn Guo]

On Tue, Sep 13, 2022 at 10:50:49AM +0800, Shawn Guo wrote:
> The following changes since commit 8f143b9f3849828870bb2a7f28288095ad9a329d:
> 
>   arm64: dts: freescale: verdin-imx8mp: fix atmel_mxt_ts reset polarity (2022-08-22 10:07:46 +0800)
> 
> are available in the Git repository at:
> 
>   git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux.git tags/imx-fixes-6.0-2
> 
> for you to fetch changes up to c1f84a75babecd9fa11f128f2da8991e2f8fb179:
> 
>   arm64: dts: imx8mp-venice-gw74xx: fix port/phy validation (2022-09-13 10:23:48 +0800)
> 
> ----------------------------------------------------------------
> i.MX fixes for 6.0, 2nd round:
> 
> - A couple of TQMa8MPQL device tree fixes from Alexander Stein on button
>   GPIOs and PCF85063 RTC alarm pinctrl.
> - Include phy-imx8-pcie.h header in tqma8mqml-mba8mx device tree to fix
>   build errors when this SoM dtsi is included on customer carrier boards.
> - Remove GPU power domain reset from i.MX8MN device tree to fix
>   a sporadical hang seen with GPUMIX powering up.
> - Correct CPLD_Dn GPIO label mapping for Toradex Verdin based Menlo
>   board.
> - Add ARCH_NXP back to defconfig, which was dropped accidentally by
>   commit 566e373fe047 ("arm64: Kconfig.platforms: Group NXP platforms
>   together").
> - Add missing #reset-cells for i.MX8ULP PCC clock controllers.
> - Update PMIC voltages for imx8mm-verdin board to fix an issue with one
>   Toradex SKU that uses a consumer-grade chip that is capable of going up
>   to 1.8GHz at 1.00V.
> - A series of imx8mp-venice-gw74xx device tree changes from Tim Harvey
>   to fix things on CAN STBY polarity, KSZ9477 CPU uplink port and
>   phy-mode.
> 
> ----------------------------------------------------------------
> Alexander Stein (2):
>       arm64: dts: tqma8mpxl-ba8mpxl: Fix button GPIOs
>       arm64: dts: imx8mp-tqma8mpql-mba8mpxl: add missing pinctrl for RTC alarm
> 
> Fabio Estevam (1):
>       arm64: dts: tqma8mqml: Include phy-imx8-pcie.h header
> 
> Marco Felsch (1):
>       arm64: dts: imx8mn: remove GPU power domain reset
> 
> Marek Vasut (1):
>       arm64: dts: imx8mm: Reverse CPLD_Dn GPIO label mapping on MX8Menlo
> 
> Michael Walle (1):
>       arm64: defconfig: enable ARCH_NXP
> 
> Peng Fan (1):
>       arm64: dts: imx8ulp: add #reset-cells for pcc
> 
> Philippe Schenker (1):
>       arm64: dts: imx8mm-verdin: extend pmic voltages
> 
> Tim Harvey (3):
>       arm64: dts: imx8mp-venice-gw74xx: fix CAN STBY polarity
>       arm64: dts: imx8mp-venice-gw74xx: fix ksz9477 cpu port
>       arm64: dts: imx8mp-venice-gw74xx: fix port/phy validation

The Fixes tag in this commit had a minor format issue.  I fixed it up
and thus updated the PR as blow.

Shawn

The following changes since commit 8f143b9f3849828870bb2a7f28288095ad9a329d:

  arm64: dts: freescale: verdin-imx8mp: fix atmel_mxt_ts reset polarity (2022-08-22 10:07:46 +0800)

are available in the Git repository at:

  git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux.git tags/imx-fixes-6.0-2

for you to fetch changes up to f7fc391a5e28216150ab5390df35032309ead7e5:

  arm64: dts: imx8mp-venice-gw74xx: fix port/phy validation (2022-09-14 11:45:09 +0800)

----------------------------------------------------------------
i.MX fixes for 6.0, 2nd round:

- A couple of TQMa8MPQL device tree fixes from Alexander Stein on button
  GPIOs and PCF85063 RTC alarm pinctrl.
- Include phy-imx8-pcie.h header in tqma8mqml-mba8mx device tree to fix
  build errors when this SoM dtsi is included on customer carrier boards.
- Remove GPU power domain reset from i.MX8MN device tree to fix
  a sporadical hang seen with GPUMIX powering up.
- Correct CPLD_Dn GPIO label mapping for Toradex Verdin based Menlo
  board.
- Add ARCH_NXP back to defconfig, which was dropped accidentally by
  commit 566e373fe047 ("arm64: Kconfig.platforms: Group NXP platforms
  together").
- Add missing #reset-cells for i.MX8ULP PCC clock controllers.
- Update PMIC voltages for imx8mm-verdin board to fix an issue with one
  Toradex SKU that uses a consumer-grade chip that is capable of going up
  to 1.8GHz at 1.00V.
- A series of imx8mp-venice-gw74xx device tree changes from Tim Harvey
  to fix things on CAN STBY polarity, KSZ9477 CPU uplink port and
  phy-mode.

----------------------------------------------------------------
Alexander Stein (2):
      arm64: dts: tqma8mpxl-ba8mpxl: Fix button GPIOs
      arm64: dts: imx8mp-tqma8mpql-mba8mpxl: add missing pinctrl for RTC alarm

Fabio Estevam (1):
      arm64: dts: tqma8mqml: Include phy-imx8-pcie.h header

Marco Felsch (1):
      arm64: dts: imx8mn: remove GPU power domain reset

Marek Vasut (1):
      arm64: dts: imx8mm: Reverse CPLD_Dn GPIO label mapping on MX8Menlo

Michael Walle (1):
      arm64: defconfig: enable ARCH_NXP

Peng Fan (1):
      arm64: dts: imx8ulp: add #reset-cells for pcc

Philippe Schenker (1):
      arm64: dts: imx8mm-verdin: extend pmic voltages

Tim Harvey (3):
      arm64: dts: imx8mp-venice-gw74xx: fix CAN STBY polarity
      arm64: dts: imx8mp-venice-gw74xx: fix ksz9477 cpu port
      arm64: dts: imx8mp-venice-gw74xx: fix port/phy validation

 arch/arm64/boot/dts/freescale/imx8mm-mx8menlo.dts           | 10 +++++-----
 arch/arm64/boot/dts/freescale/imx8mm-tqma8mqml-mba8mx.dts   |  1 -
 arch/arm64/boot/dts/freescale/imx8mm-tqma8mqml.dtsi         |  1 +
 arch/arm64/boot/dts/freescale/imx8mm-verdin.dtsi            | 10 +++++-----
 arch/arm64/boot/dts/freescale/imx8mn.dtsi                   |  1 -
 arch/arm64/boot/dts/freescale/imx8mp-tqma8mpql-mba8mpxl.dts | 10 ++++++++--
 arch/arm64/boot/dts/freescale/imx8mp-venice-gw74xx.dts      | 12 ++++++++----
 arch/arm64/boot/dts/freescale/imx8ulp.dtsi                  |  3 +++
 arch/arm64/configs/defconfig                                |  1 +
 9 files changed, 31 insertions(+), 18 deletions(-)