[PATCH stable-5.10] arm64: errata: add detection for AMEVCNTR01 incrementing incorrectly

[Greg Kroah-Hartman]

On Mon, Sep 12, 2022 at 02:52:26PM +0100, Ionela Voinescu wrote:
> commit e89d120c4b720e232cc6a94f0fcbd59c15d41489 upstream.
> 
> The AMU counter AMEVCNTR01 (constant counter) should increment at the same
> rate as the system counter. On affected Cortex-A510 cores, AMEVCNTR01
> increments incorrectly giving a significantly higher output value. This
> results in inaccurate task scheduler utilization tracking.
> 
> Work around this problem by keeping the reference values of affected
> counters to 0. This results in disabling the single user of this
> counter: Frequency Invariance Engine (FIE).
> This effect is the same to firmware disabling affected counters, in
> which case 0 will be returned when reading the disabled counters.
> 
> Therefore, AMU counters will not be used for frequency invariance for
> affected CPUs and CPUs in the same cpufreq policy. AMUs can still be used
> for frequency invariance for unaffected CPUs in the system.
> 
> The above is achieved through adding a new erratum: ARM64_ERRATUM_2457168.
> 
> Signed-off-by: Ionela Voinescu <ionela.voinescu at arm.com>
> Cc: Catalin Marinas <catalin.marinas at arm.com>
> Cc: Will Deacon <will at kernel.org>
> Cc: James Morse <james.morse at arm.com>
> Link: https://lore.kernel.org/r/20220819103050.24211-1-ionela.voinescu@arm.com
> ---
> 
> Hi,
> 
> This is a backport to stable 5.10.142 of the upstream commit
> e89d120c4b72  arm64: errata: add detection for AMEVCNTR01 incrementing incorrectly
> 
> This is sent separately as there were conflicts that needed resolving
> when applying the mainline patch. Compared to the upstream version this
> no longer handles the FFH usecase, as FFH support is not present in 5.10.
> Therefore the commit message and Kconfig description are modified to
> only describe the effect on FIE caused by this erratum.

Both backports now queued up, thanks.

greg k-h