[PATCH v2 05/19] EDAC/synopsys: Fix reading errors count before ECC status

[Datta, Shubhrajyoti]

[AMD Official Use Only - General]



> -----Original Message-----
> From: Serge Semin <Sergey.Semin at baikalelectronics.ru>
> Sent: Sunday, September 11, 2022 1:12 AM
> To: Rob Herring <robh+dt at kernel.org>; Krzysztof Kozlowski
> <krzysztof.kozlowski+dt at linaro.org>; Michal Simek
> <michal.simek at xilinx.com>; Borislav Petkov <bp at alien8.de>; Mauro
> Carvalho Chehab <mchehab at kernel.org>; Tony Luck
> <tony.luck at intel.com>; James Morse <james.morse at arm.com>; Robert
> Richter <rric at kernel.org>; Shubhrajyoti Datta
> <shubhrajyoti.datta at xilinx.com>
> Cc: Serge Semin <Sergey.Semin at baikalelectronics.ru>; Serge Semin
> <fancer.lancer at gmail.com>; Alexey Malahov
> <Alexey.Malahov at baikalelectronics.ru>; Michail Ivanov
> <Michail.Ivanov at baikalelectronics.ru>; Pavel Parkhomenko
> <Pavel.Parkhomenko at baikalelectronics.ru>; Punnaiah Choudary Kalluri
> <punnaiah.choudary.kalluri at xilinx.com>; Manish Narani
> <manish.narani at xilinx.com>; Dinh Nguyen <dinguyen at kernel.org>; Rob
> Herring <robh at kernel.org>; Krzysztof Kozlowski
> <krzysztof.kozlowski at linaro.org>; devicetree at vger.kernel.org; linux-arm-
> kernel at lists.infradead.org; linux-edac at vger.kernel.org; linux-
> kernel at vger.kernel.org; Borislav Petkov <bp at suse.de>
> Subject: [PATCH v2 05/19] EDAC/synopsys: Fix reading errors count before
> ECC status
> 
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> 
> 
> Aside with fixing the errors count CSR usage the commit e2932d1f6f05
> ("EDAC/synopsys: Read the error count from the correct register") all of the
> sudden has also changed the order of the errors status check procedure. So
> now the errors handler method first reads the number of CE and UE and only
> then makes sure that any of these errors have actually happened. It doesn't
> make much sense. Let's fix that by getting back the procedures order: first
> check the ECC status, then read the number of errors.
> 
> Fixes: e2932d1f6f05 ("EDAC/synopsys: Read the error count from the correct
> register")
> Signed-off-by: Serge Semin <Sergey.Semin at baikalelectronics.ru>


Reviewed-by: Shubhrajyoti Datta <shubhrajyoti.datta at amd.com>

> ---
>  drivers/edac/synopsys_edac.c | 12 ++++++------
>  1 file changed, 6 insertions(+), 6 deletions(-)
> 
> diff --git a/drivers/edac/synopsys_edac.c b/drivers/edac/synopsys_edac.c
> index da1d90a87778..558d3b3e6864 100644
> --- a/drivers/edac/synopsys_edac.c
> +++ b/drivers/edac/synopsys_edac.c
> @@ -423,18 +423,18 @@ static int zynqmp_get_error_info(struct
> synps_edac_priv *priv)
>         base = priv->baseaddr;
>         p = &priv->stat;
> 
> -       regval = readl(base + ECC_ERRCNT_OFST);
> -       p->ce_cnt = regval & ECC_ERRCNT_CECNT_MASK;
> -       p->ue_cnt = (regval & ECC_ERRCNT_UECNT_MASK) >>
> ECC_ERRCNT_UECNT_SHIFT;
> -       if (!p->ce_cnt)
> -               goto ue_err;
> -
>         regval = readl(base + ECC_STAT_OFST);
>         if (!regval)
>                 return 1;
> 
>         p->ceinfo.bitpos = (regval & ECC_STAT_BITNUM_MASK);
> 
> +       regval = readl(base + ECC_ERRCNT_OFST);
> +       p->ce_cnt = regval & ECC_ERRCNT_CECNT_MASK;
> +       p->ue_cnt = (regval & ECC_ERRCNT_UECNT_MASK) >>
> ECC_ERRCNT_UECNT_SHIFT;
> +       if (!p->ce_cnt)
> +               goto ue_err;
> +
>         regval = readl(base + ECC_CEADDR0_OFST);
>         p->ceinfo.row = (regval & ECC_CEADDR0_RW_MASK);
>         regval = readl(base + ECC_CEADDR1_OFST);
> --
> 2.37.2