[PATCH v6 00/28] arm64/sysreg: More system register generation

[Catalin Marinas]

On Mon, 5 Sep 2022 23:53:57 +0100, Mark Brown wrote:
> This series continues on with the conversion of the system registers to
> automatic generation, together with a few cleanups and improvements that
> were identified as part of looking through all the register definitions
> and bringing them into line with the conventions we've been using.
> 
> v6:
>  - s/SMEver.SME/SMEver.IMP/
>  - Update some more uses of ID_AA64MMFR2_EL1_LVA_SHIFT.
>  - Correct ASIDBITS value for 16 bits.
>  - Update ID_AA64PFR0_EL1 conversion to DDI0487I.a which has been
>    released in the time this series was pending.
> v5:
>  - Rebase onto v6.0-rc3.
> v4:
>  - Rebase onto v6.0-rc1.
> v3:
>  - Fix some missed ID_AA64MMFR0_EL1 _EL1 additions.
>  - Fix an EL1_EL0->EL1_EL1 misupdate.
> v2:
>  - Rebase onto v6.0-rc1.
>  - Include Kristina Martsenko's conversion of ID_AA64MMFR1_EL1.
>  - Add conversions of ID_AA64MMFR0_EL1, ID_AA64MMFR2_EL1,
>    ID_AA64PFR0_EL1, TPIDR_EL1 and SCXTNUM_EL1.
>  - Add definition of ALLINT.
>  - Add a fix switching ID_AA64SMFR0_EL1.SMEVer to be an enumeration.
> 
> [...]

Applied to arm64 (for-next/sysreg), thanks!

[01/28] arm64/sysreg: Remove stray SMIDR_EL1 defines
        https://git.kernel.org/arm64/c/a04054362e4a
[02/28] arm64/sysreg: Describe ID_AA64SMFR0_EL1.SMEVer as an enumeration
        https://git.kernel.org/arm64/c/4c8b18af25be
[03/28] arm64: cache: Remove unused CTR_CACHE_MINLINE_MASK
        https://git.kernel.org/arm64/c/d9b230f64419
[04/28] arm64/sysreg: Add _EL1 into ID_AA64MMFR0_EL1 definition names
        https://git.kernel.org/arm64/c/2d987e64e8c7
[05/28] arm64/sysreg: Add _EL1 into ID_AA64MMFR2_EL1 definition names
        https://git.kernel.org/arm64/c/a957c6be2b88
[06/28] arm64/sysreg: Add _EL1 into ID_AA64PFR0_EL1 definition names
        https://git.kernel.org/arm64/c/55adc08d7e64
[07/28] arm64/sysreg: Add _EL1 into ID_AA64PFR1_EL1 constant names
        https://git.kernel.org/arm64/c/6ca2b9ca459a
[08/28] arm64/sysreg: Standardise naming of ID_AA64MMFR0_EL1.BigEnd
        https://git.kernel.org/arm64/c/ed7c138d6f82
[09/28] arm64/sysreg: Standardise naming of ID_AA64MMFR0_EL1.ASIDBits
        https://git.kernel.org/arm64/c/07d7d848b96b
[10/28] arm64/sysreg: Standardise naming for ID_AA64MMFR1_EL1 fields
        https://git.kernel.org/arm64/c/6fcd01935902
[11/28] arm64/sysreg: Standardise naming for ID_AA64MMFR2_EL1.VARange
        https://git.kernel.org/arm64/c/8f40baded4a1
[12/28] arm64/sysreg: Standardise naming for ID_AA64MMFR2_EL1.CnP
        https://git.kernel.org/arm64/c/ca951862ad3e
[13/28] arm64/sysreg: Standardise naming for ID_AA64PFR0_EL1 constants
        https://git.kernel.org/arm64/c/4f8456c3199d
[14/28] arm64/sysreg: Standardise naming for ID_AA64PFR0_EL1.AdvSIMD constants
        https://git.kernel.org/arm64/c/5620b4b03715
[15/28] arm64/sysreg: Standardise naming for SSBS feature enumeration
        https://git.kernel.org/arm64/c/53275da8dccc
[16/28] arm64/sysreg: Standardise naming for MTE feature enumeration
        https://git.kernel.org/arm64/c/2e75b393ff2e
[17/28] arm64/sysreg: Standardise naming of ID_AA64PFR1_EL1 fractional version fields
        https://git.kernel.org/arm64/c/cf7fdbbe83a7
[18/28] arm64/sysreg: Standardise naming of ID_AA64PFR1_EL1 BTI enumeration
        https://git.kernel.org/arm64/c/514e9b2aed04
[19/28] arm64/sysreg: Standardise naming of ID_AA64PFR1_EL1 SME enumeration
        https://git.kernel.org/arm64/c/ed9075201c5a
[20/28] arm64/sysreg: Convert HCRX_EL2 to automatic generation
        https://git.kernel.org/arm64/c/cfaa32108aea
[21/28] arm64/sysreg: Convert ID_AA64MMFR0_EL1 to automatic generation
        https://git.kernel.org/arm64/c/0b7ed4d8f59c
[22/28] arm64/sysreg: Convert ID_AA64MMFR1_EL1 to automatic generation
        https://git.kernel.org/arm64/c/7d751b313dd9
[23/28] arm64/sysreg: Convert ID_AA64MMFR2_EL1 to automatic generation
        https://git.kernel.org/arm64/c/cfa3a6c55b61
[24/28] arm64/sysreg: Convert ID_AA64PFR0_EL1 to automatic generation
        https://git.kernel.org/arm64/c/cea08f2bf406
[25/28] arm64/sysreg: Convert ID_AA64PFR1_EL1 to automatic generation
        https://git.kernel.org/arm64/c/ef4ba5a635bf
[26/28] arm64/sysreg: Convert TIPDR_EL1 to automatic generation
        https://git.kernel.org/arm64/c/0a45f3980db0
[27/28] arm64/sysreg: Convert SCXTNUM_EL1 to automatic generation
        https://git.kernel.org/arm64/c/b1179b75e9a8
[28/28] arm64/sysreg: Add defintion for ALLINT
        https://git.kernel.org/arm64/c/3e9ae1ce508b

-- 
Catalin