[PATCH v5 24/28] arm64/sysreg: Convert ID_AA64PFR0_EL1 to automatic generation
Kristina Martsenko
kristina.martsenko at arm.com
Fri Sep 2 11:02:51 PDT 2022
On 30/08/2022 11:21, Mark Brown wrote:
> Automatically generate the constants for ID_AA64PFR0_EL1 as per DDI0487H.a,
> no functional changes. The generic defines for the ELx fields are left in
> place as they remain useful.
>
> Signed-off-by: Mark Brown <broonie at kernel.org>
> ---
> diff --git a/arch/arm64/tools/sysreg b/arch/arm64/tools/sysreg
> index 2170c9074137..fc32b0649160 100644
> --- a/arch/arm64/tools/sysreg
> +++ b/arch/arm64/tools/sysreg
> @@ -46,6 +46,83 @@
> # feature that introduces them (eg, FEAT_LS64_ACCDATA introduces enumeration
> # item ACCDATA) though it may be more taseful to do something else.
>
> +Sysreg ID_AA64PFR0_EL1 3 0 0 4 0
> +Enum 63:60 CSV3
> + 0b0000 NI
> + 0b0001 IMP
> +EndEnum
> +Enum 59:56 CSV2
> + 0b0000 NI
> + 0b0001 IMP
> + 0b0010 CSV2_2
> +EndEnum
The new ARM ARM (DDI 0487I.a) has added a CSV2_3 option here.
> +Enum 15:12 EL3
> + 0b0000 NI
> + 0b0001 IMP
> + 0b0010 AARCH32
> +EndEnum
> +Enum 11:8 EL2
> + 0b0000 NI
> + 0b0001 IMP
> + 0b0010 AARCH32
> +EndEnum
> +Enum 7:4 EL1
> + 0b0000 NI
> + 0b0001 IMP
> + 0b0010 AARCH32
> +EndEnum
> +Enum 3:0 EL0
> + 0b0000 NI
> + 0b0001 IMP
> + 0b0010 AARCH32
> +EndEnum
EL0 and EL1 don't have NI options in the ARM ARM.
Thanks,
Kristina
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