[PATCH 6/6] gpio: macsmc: Add IRQ support
Russell King (Oracle)
rmk+kernel at armlinux.org.uk
Thu Sep 1 06:54:50 PDT 2022
From: Hector Martin <marcan at marcan.st>
Add IRQ support to the macsmc driver. This patch has updates from Joey
Gouly and Russell King.
Signed-off-by: Hector Martin <marcan at marcan.st>
Signed-off-by: Russell King (Oracle) <rmk+kernel at armlinux.org.uk>
---
drivers/gpio/gpio-macsmc.c | 156 +++++++++++++++++++++++++++++++++++++
1 file changed, 156 insertions(+)
diff --git a/drivers/gpio/gpio-macsmc.c b/drivers/gpio/gpio-macsmc.c
index ff9950afb69a..939e2dc33c6f 100644
--- a/drivers/gpio/gpio-macsmc.c
+++ b/drivers/gpio/gpio-macsmc.c
@@ -10,6 +10,7 @@
#include <linux/bitmap.h>
#include <linux/device.h>
#include <linux/gpio/driver.h>
+#include <linux/irq.h>
#include <linux/mfd/core.h>
#include <linux/mfd/macsmc.h>
@@ -68,10 +69,20 @@
* 3 = ?
*/
+#define SMC_EV_GPIO 0x7202
+
struct macsmc_gpio {
struct device *dev;
struct apple_smc *smc;
struct gpio_chip gc;
+ struct notifier_block nb;
+
+ struct mutex irq_mutex;
+ DECLARE_BITMAP(irq_supported, MAX_GPIO);
+ DECLARE_BITMAP(irq_enable_shadow, MAX_GPIO);
+ DECLARE_BITMAP(irq_enable, MAX_GPIO);
+ u32 irq_mode_shadow[MAX_GPIO];
+ u32 irq_mode[MAX_GPIO];
int first_index;
};
@@ -161,6 +172,7 @@ static int macsmc_gpio_init_valid_mask(struct gpio_chip *gc,
for (i = 0; i < count; i++) {
smc_key key;
int gpio_nr;
+ u32 val;
int ret = apple_smc_get_key_by_index(smcgp->smc, smcgp->first_index + i, &key);
if (ret < 0)
@@ -176,11 +188,143 @@ static int macsmc_gpio_init_valid_mask(struct gpio_chip *gc,
}
set_bit(gpio_nr, valid_mask);
+
+ /* Check for IRQ support */
+ ret = apple_smc_rw_u32(smcgp->smc, key, CMD_IRQ_MODE, &val);
+ if (!ret)
+ set_bit(gpio_nr, smcgp->irq_supported);
+ }
+
+ return 0;
+}
+
+static int macsmc_gpio_event(struct notifier_block *nb, unsigned long event, void *data)
+{
+ struct macsmc_gpio *smcgp = container_of(nb, struct macsmc_gpio, nb);
+ u16 type = event >> 16;
+ u8 offset = (event >> 8) & 0xff;
+ smc_key key = macsmc_gpio_key(offset);
+ unsigned long flags;
+ int ret;
+
+ if (type != SMC_EV_GPIO)
+ return NOTIFY_DONE;
+
+ if (offset > MAX_GPIO) {
+ dev_err(smcgp->dev, "GPIO event index %d out of range\n", offset);
+ return NOTIFY_BAD;
+ }
+
+ local_irq_save(flags);
+ ret = generic_handle_domain_irq(smcgp->gc.irq.domain, offset);
+ local_irq_restore(flags);
+
+ if (apple_smc_write_u32(smcgp->smc, key, CMD_IRQ_ACK | 1) < 0)
+ dev_err(smcgp->dev, "GPIO IRQ ack failed for %p4ch\n", &key);
+
+ return (ret == 0) ? NOTIFY_OK : NOTIFY_DONE;
+}
+
+static void macsmc_gpio_irq_enable(struct irq_data *d)
+{
+ struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
+ struct macsmc_gpio *smcgp = gpiochip_get_data(gc);
+
+ gpiochip_enable_irq(gc, irqd_to_hwirq(d));
+ set_bit(irqd_to_hwirq(d), smcgp->irq_enable_shadow);
+}
+
+static void macsmc_gpio_irq_disable(struct irq_data *d)
+{
+ struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
+ struct macsmc_gpio *smcgp = gpiochip_get_data(gc);
+
+ clear_bit(irqd_to_hwirq(d), smcgp->irq_enable_shadow);
+ gpiochip_disable_irq(gc, irqd_to_hwirq(d));
+}
+
+static int macsmc_gpio_irq_set_type(struct irq_data *d, unsigned int type)
+{
+ struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
+ struct macsmc_gpio *smcgp = gpiochip_get_data(gc);
+ int offset = irqd_to_hwirq(d);
+ u32 mode;
+
+ if (!test_bit(offset, smcgp->irq_supported))
+ return -EINVAL;
+
+ switch (type & IRQ_TYPE_SENSE_MASK) {
+ case IRQ_TYPE_LEVEL_HIGH:
+ mode = IRQ_MODE_HIGH;
+ break;
+ case IRQ_TYPE_LEVEL_LOW:
+ mode = IRQ_MODE_LOW;
+ break;
+ case IRQ_TYPE_EDGE_RISING:
+ mode = IRQ_MODE_RISING;
+ break;
+ case IRQ_TYPE_EDGE_FALLING:
+ mode = IRQ_MODE_FALLING;
+ break;
+ case IRQ_TYPE_EDGE_BOTH:
+ mode = IRQ_MODE_BOTH;
+ break;
+ default:
+ return -EINVAL;
}
+ smcgp->irq_mode_shadow[offset] = mode;
return 0;
}
+static void macsmc_gpio_irq_bus_lock(struct irq_data *d)
+{
+ struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
+ struct macsmc_gpio *smcgp = gpiochip_get_data(gc);
+
+ mutex_lock(&smcgp->irq_mutex);
+}
+
+static void macsmc_gpio_irq_bus_sync_unlock(struct irq_data *d)
+{
+ struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
+ struct macsmc_gpio *smcgp = gpiochip_get_data(gc);
+ smc_key key = macsmc_gpio_key(irqd_to_hwirq(d));
+ int offset = irqd_to_hwirq(d);
+ bool val;
+
+ if (smcgp->irq_mode_shadow[offset] != smcgp->irq_mode[offset]) {
+ u32 cmd = CMD_IRQ_MODE | smcgp->irq_mode_shadow[offset];
+ if (apple_smc_write_u32(smcgp->smc, key, cmd) < 0)
+ dev_err(smcgp->dev, "GPIO IRQ config failed for %p4ch = 0x%x\n", &key, cmd);
+ else
+ smcgp->irq_mode_shadow[offset] = smcgp->irq_mode[offset];
+ }
+
+ val = test_bit(offset, smcgp->irq_enable_shadow);
+ if (test_bit(offset, smcgp->irq_enable) != val) {
+ if (apple_smc_write_u32(smcgp->smc, key, CMD_IRQ_ENABLE | val) < 0)
+ dev_err(smcgp->dev, "GPIO IRQ en/disable failed for %p4ch\n", &key);
+ else
+ change_bit(offset, smcgp->irq_enable);
+ }
+
+ mutex_unlock(&smcgp->irq_mutex);
+}
+
+static const struct irq_chip macsmc_gpio_irqchip = {
+ .name = "macsmc-pmu-gpio",
+ .irq_mask = macsmc_gpio_irq_disable,
+ .irq_unmask = macsmc_gpio_irq_enable,
+ .irq_set_type = macsmc_gpio_irq_set_type,
+ .irq_bus_lock = macsmc_gpio_irq_bus_lock,
+ .irq_bus_sync_unlock = macsmc_gpio_irq_bus_sync_unlock,
+ .irq_set_type = macsmc_gpio_irq_set_type,
+ .flags = IRQCHIP_SET_TYPE_MASKED |
+ IRQCHIP_MASK_ON_SUSPEND | IRQCHIP_IMMUTABLE,
+ GPIOCHIP_IRQ_RESOURCE_HELPERS,
+};
+
static int macsmc_gpio_probe(struct platform_device *pdev)
{
struct macsmc_gpio *smcgp;
@@ -221,6 +365,18 @@ static int macsmc_gpio_probe(struct platform_device *pdev)
smcgp->gc.base = -1;
smcgp->gc.parent = &pdev->dev;
+ gpio_irq_chip_set_chip(&smcgp->gc.irq, &macsmc_gpio_irqchip);
+ smcgp->gc.irq.parent_handler = NULL;
+ smcgp->gc.irq.num_parents = 0;
+ smcgp->gc.irq.parents = NULL;
+ smcgp->gc.irq.default_type = IRQ_TYPE_NONE;
+ smcgp->gc.irq.handler = handle_simple_irq;
+
+ mutex_init(&smcgp->irq_mutex);
+
+ smcgp->nb.notifier_call = macsmc_gpio_event;
+ apple_smc_register_notifier(smc, &smcgp->nb);
+
return devm_gpiochip_add_data(&pdev->dev, &smcgp->gc, smcgp);
}
--
2.30.2
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