[PATCH v1 9/9] arm64/sysreg: Generate definitions for FAR_ELx

[Mark Rutland]

On Tue, May 17, 2022 at 07:22:19PM +0100, Mark Brown wrote:
> Convert FAR_ELx to automatic register generation as per DDI0487H.a. In the
> architecture these registers have a single field "named" as "Faulting
> Virtual Address for synchronous exceptions taken to ELx" occupying the
> entire register, in order to fit in with the requirement to describe the
> contents of the register I have created a single field named ADDR.

FWIW, that sounds fine by me.

> 
> No functional change.
> 
> Signed-off-by: Mark Brown <broonie at kernel.org>
> ---
>  arch/arm64/include/asm/sysreg.h |  3 ---
>  arch/arm64/tools/sysreg         | 12 ++++++++++++
>  2 files changed, 12 insertions(+), 3 deletions(-)
> 
> diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h
> index 09dc437030f5..8ab15c262864 100644
> --- a/arch/arm64/include/asm/sysreg.h
> +++ b/arch/arm64/include/asm/sysreg.h
> @@ -249,7 +249,6 @@
>  #define SYS_TFSR_EL1			sys_reg(3, 0, 5, 6, 0)
>  #define SYS_TFSRE0_EL1			sys_reg(3, 0, 5, 6, 1)
>  
> -#define SYS_FAR_EL1			sys_reg(3, 0, 6, 0, 0)
>  #define SYS_PAR_EL1			sys_reg(3, 0, 7, 4, 0)
>  
>  #define SYS_PAR_EL1_F			BIT(0)
> @@ -560,7 +559,6 @@
>  #define SYS_VSESR_EL2			sys_reg(3, 4, 5, 2, 3)
>  #define SYS_FPEXC32_EL2			sys_reg(3, 4, 5, 3, 0)
>  #define SYS_TFSR_EL2			sys_reg(3, 4, 5, 6, 0)
> -#define SYS_FAR_EL2			sys_reg(3, 4, 6, 0, 0)
>  
>  #define SYS_VDISR_EL2			sys_reg(3, 4, 12, 1,  1)
>  #define __SYS__AP0Rx_EL2(x)		sys_reg(3, 4, 12, 8, x)
> @@ -615,7 +613,6 @@
>  #define SYS_AFSR1_EL12			sys_reg(3, 5, 5, 1, 1)
>  #define SYS_ESR_EL12			sys_reg(3, 5, 5, 2, 0)
>  #define SYS_TFSR_EL12			sys_reg(3, 5, 5, 6, 0)
> -#define SYS_FAR_EL12			sys_reg(3, 5, 6, 0, 0)
>  #define SYS_MAIR_EL12			sys_reg(3, 5, 10, 2, 0)
>  #define SYS_AMAIR_EL12			sys_reg(3, 5, 10, 3, 0)
>  #define SYS_VBAR_EL12			sys_reg(3, 5, 12, 0, 0)
> diff --git a/arch/arm64/tools/sysreg b/arch/arm64/tools/sysreg
> index 1cd1e4ea42e3..b725edc9626b 100644
> --- a/arch/arm64/tools/sysreg
> +++ b/arch/arm64/tools/sysreg
> @@ -228,6 +228,10 @@ Sysreg	SMCR_EL1	3	0	1	2	6
>  Fields	SMCR_ELx
>  EndSysreg
>  
> +Sysreg	FAR_EL1	3	0	6	0	0
> +Field	63:0	ADDR
> +EndSysreg
> +
>  SysregFields	CONTEXTIDR_ELx
>  Res0	63:32
>  Field	31:0	PROCID
> @@ -351,6 +355,10 @@ Field	3:2	D1
>  Field	1:0	D0
>  EndSysreg
>  
> +Sysreg	FAR_EL2	3	4	6	0	0
> +Field	63:0	ADDR
> +EndSysreg
> +
>  Sysreg	CONTEXTIDR_EL2	3	4	13	0	1
>  Fields	CONTEXTIDR_ELx
>  EndSysreg
> @@ -367,6 +375,10 @@ Sysreg	SMCR_EL12	3	5	1	2	6
>  Fields	SMCR_ELx
>  EndSysreg
>  
> +Sysreg	FAR_EL12	3	5	6	0	0
> +Field	63:0	ADDR
> +EndSysreg

These all look correct to me per ARM DDI 0487H.a.

Reviewed-by: Mark Rutland <mark.rutland at arm.com>

Mark.


> +
>  Sysreg	CONTEXTIDR_EL12	3	5	13	0	1
>  Fields	CONTEXTIDR_ELx
>  EndSysreg
> -- 
> 2.30.2
>