[xilinx-xlnx:xlnx_rebase_v5.15_LTS 541/1029] drivers/iio/adc/xilinx-ams.c:384:10: warning: signed shift result (0x446A60000) requires 36 bits to represent, but 'long' only has 32 bits
kernel test robot
lkp at intel.com
Sun Mar 27 11:27:50 PDT 2022
tree: https://github.com/Xilinx/linux-xlnx xlnx_rebase_v5.15_LTS
head: 1870e0fa79a9d58c6748c34550f3ccea0b515933
commit: d073b83d3f8f3ba83c59f7502371b1cf9eb35e92 [541/1029] iio: adc: Add Xilinx AMS driver
config: arm-randconfig-c002-20220327 (https://download.01.org/0day-ci/archive/20220328/202203280217.8cuVg5lK-lkp@intel.com/config)
compiler: clang version 15.0.0 (https://github.com/llvm/llvm-project 0f6d9501cf49ce02937099350d08f20c4af86f3d)
reproduce (this is a W=1 build):
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# install arm cross compiling tool for clang build
# apt-get install binutils-arm-linux-gnueabi
# https://github.com/Xilinx/linux-xlnx/commit/d073b83d3f8f3ba83c59f7502371b1cf9eb35e92
git remote add xilinx-xlnx https://github.com/Xilinx/linux-xlnx
git fetch --no-tags xilinx-xlnx xlnx_rebase_v5.15_LTS
git checkout d073b83d3f8f3ba83c59f7502371b1cf9eb35e92
# save the config file to linux build tree
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp at intel.com>
All warnings (new ones prefixed by >>):
>> drivers/iio/adc/xilinx-ams.c:384:10: warning: signed shift result (0x446A60000) requires 36 bits to represent, but 'long' only has 32 bits [-Wshift-overflow]
*val = AMS_TEMP_OFFSET;
^~~~~~~~~~~~~~~
drivers/iio/adc/xilinx-ams.h:134:47: note: expanded from macro 'AMS_TEMP_OFFSET'
#define AMS_TEMP_OFFSET -((280230L << 16) / 509314)
~~~~~~~ ^ ~~
drivers/iio/adc/xilinx-ams.c:38:20: warning: unused function 'ams_update_reg' [-Wunused-function]
static inline void ams_update_reg(struct ams *ams, unsigned int offset,
^
2 warnings generated.
vim +/long +384 drivers/iio/adc/xilinx-ams.c
313
314 static int ams_read_raw(struct iio_dev *indio_dev,
315 struct iio_chan_spec const *chan,
316 int *val, int *val2, long mask)
317 {
318 struct ams *ams = iio_priv(indio_dev);
319
320 switch (mask) {
321 case IIO_CHAN_INFO_RAW:
322 mutex_lock(&ams->mutex);
323 if (chan->scan_index >= (PS_SEQ_MAX * 3))
324 ams_read_vcc_reg(ams, chan->address, val);
325 else if (chan->scan_index >= PS_SEQ_MAX)
326 ams->pl_bus->read(ams, chan->address, val);
327 else
328 ams_ps_read_reg(ams, chan->address, val);
329 mutex_unlock(&ams->mutex);
330
331 *val2 = 0;
332 return IIO_VAL_INT;
333 case IIO_CHAN_INFO_SCALE:
334 switch (chan->type) {
335 case IIO_VOLTAGE:
336 switch (chan->address) {
337 case AMS_SUPPLY1:
338 case AMS_SUPPLY2:
339 case AMS_SUPPLY3:
340 case AMS_SUPPLY4:
341 *val = AMS_SUPPLY_SCALE_3VOLT;
342 break;
343 case AMS_SUPPLY5:
344 case AMS_SUPPLY6:
345 if (chan->scan_index < PS_SEQ_MAX)
346 *val = AMS_SUPPLY_SCALE_6VOLT;
347 else
348 *val = AMS_SUPPLY_SCALE_3VOLT;
349 break;
350 case AMS_SUPPLY7:
351 case AMS_SUPPLY8:
352 *val = AMS_SUPPLY_SCALE_6VOLT;
353 break;
354 case AMS_SUPPLY9:
355 case AMS_SUPPLY10:
356 if (chan->scan_index < PS_SEQ_MAX)
357 *val = AMS_SUPPLY_SCALE_3VOLT;
358 else
359 *val = AMS_SUPPLY_SCALE_6VOLT;
360 break;
361 case AMS_VREFP:
362 case AMS_VREFN:
363 *val = AMS_SUPPLY_SCALE_3VOLT;
364 break;
365
366 default:
367 if (chan->scan_index >= (PS_SEQ_MAX * 3))
368 *val = AMS_SUPPLY_SCALE_3VOLT;
369 else
370 *val = AMS_SUPPLY_SCALE_1VOLT;
371 break;
372 }
373 *val2 = AMS_SUPPLY_SCALE_DIV_BIT;
374 return IIO_VAL_FRACTIONAL_LOG2;
375 case IIO_TEMP:
376 *val = AMS_TEMP_SCALE;
377 *val2 = AMS_TEMP_SCALE_DIV_BIT;
378 return IIO_VAL_FRACTIONAL_LOG2;
379 default:
380 return -EINVAL;
381 }
382 case IIO_CHAN_INFO_OFFSET:
383 /* Only the temperature channel has an offset */
> 384 *val = AMS_TEMP_OFFSET;
385 *val2 = 0;
386 return IIO_VAL_INT;
387 }
388
389 return -EINVAL;
390 }
391
--
0-DAY CI Kernel Test Service
https://01.org/lkp
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