[PATCH v2 3/4] KVM: arm64: vgic-v3: Implement MMIO-based LPI invalidation

[Oliver Upton]

On Tue, Apr 05, 2022 at 07:23:26PM +0100, Marc Zyngier wrote:
> Since GICv4.1, it has become legal for an implementation to advertise
> GICR_{INVLPIR,INVALLR,SYNCR} while having an ITS, allowing for a more
> efficient invalidation scheme (no guest command queue contention when
> multiple CPUs are generating invalidations).
> 
> Provide the invalidation registers as a primitive to their ITS
> counterpart. Note that we don't advertise them to the guest yet
> (the architecture allows an implementation to do this).
> 

I'll admit that this part tripped me up a bit, odd stuff.

> Signed-off-by: Marc Zyngier <maz at kernel.org>

Reviewed-by: Oliver Upton <oupton at google.com>