[xilinx-xlnx:xlnx_rebase_v5.10 1711/1963] drivers/mtd/nand/raw/nand_onfi.c:319:14: sparse: sparse: restricted __le16 degrades to integer

kernel test robot lkp at intel.com
Wed Sep 29 19:33:33 PDT 2021


tree:   https://github.com/Xilinx/linux-xlnx xlnx_rebase_v5.10
head:   9533b527bd9799dc64feddba388e19f0efe27bde
commit: 018df1eeae64d1817fcf3457d1214e12f2942d96 [1711/1963] mtd: rawnand: Retrieve NV-DDR timing modes from the ONFI parameter page
config: i386-randconfig-s001-20210929 (attached as .config)
compiler: gcc-9 (Debian 9.3.0-22) 9.3.0
reproduce:
        # apt-get install sparse
        # sparse version: v0.6.4-dirty
        # https://github.com/Xilinx/linux-xlnx/commit/018df1eeae64d1817fcf3457d1214e12f2942d96
        git remote add xilinx-xlnx https://github.com/Xilinx/linux-xlnx
        git fetch --no-tags xilinx-xlnx xlnx_rebase_v5.10
        git checkout 018df1eeae64d1817fcf3457d1214e12f2942d96
        # save the attached .config to linux build tree
        make W=1 C=1 CF='-fdiagnostic-prefix -D__CHECK_ENDIAN__' O=build_dir ARCH=i386 SHELL=/bin/bash drivers/mtd/nand/raw/

If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp at intel.com>


sparse warnings: (new ones prefixed by >>)
>> drivers/mtd/nand/raw/nand_onfi.c:319:14: sparse: sparse: restricted __le16 degrades to integer
   drivers/mtd/nand/raw/nand_onfi.c:321:26: sparse: sparse: cast to restricted __le16

vim +319 drivers/mtd/nand/raw/nand_onfi.c

   140	
   141	/*
   142	 * Check if the NAND chip is ONFI compliant, returns 1 if it is, 0 otherwise.
   143	 */
   144	int nand_onfi_detect(struct nand_chip *chip)
   145	{
   146		struct nand_device *base = &chip->base;
   147		struct mtd_info *mtd = nand_to_mtd(chip);
   148		struct nand_memory_organization *memorg;
   149		struct nand_onfi_params *p = NULL, *pbuf;
   150		struct onfi_params *onfi;
   151		bool use_datain = false;
   152		int onfi_version = 0;
   153		char id[4];
   154		int i, ret, val;
   155		u16 crc;
   156	
   157		memorg = nanddev_get_memorg(&chip->base);
   158	
   159		/* Try ONFI for unknown chip or LP */
   160		ret = nand_readid_op(chip, 0x20, id, sizeof(id));
   161		if (ret || strncmp(id, "ONFI", 4))
   162			return 0;
   163	
   164		/* ONFI chip: allocate a buffer to hold its parameter page */
   165		pbuf = kzalloc((sizeof(*pbuf) * ONFI_PARAM_PAGES), GFP_KERNEL);
   166		if (!pbuf)
   167			return -ENOMEM;
   168	
   169		if (!nand_has_exec_op(chip) ||
   170		    !nand_read_data_op(chip, &pbuf[0], sizeof(*pbuf), true, true))
   171			use_datain = true;
   172	
   173		for (i = 0; i < ONFI_PARAM_PAGES; i++) {
   174			if (!i)
   175				ret = nand_read_param_page_op(chip, 0, &pbuf[i],
   176							      sizeof(*pbuf));
   177			else if (use_datain)
   178				ret = nand_read_data_op(chip, &pbuf[i], sizeof(*pbuf),
   179							true, false);
   180			else
   181				ret = nand_change_read_column_op(chip, sizeof(*pbuf) * i,
   182								 &pbuf[i], sizeof(*pbuf),
   183								 true);
   184			if (ret) {
   185				ret = 0;
   186				goto free_onfi_param_page;
   187			}
   188	
   189			crc = onfi_crc16(ONFI_CRC_BASE, (u8 *)&pbuf[i], 254);
   190			if (crc == le16_to_cpu(pbuf[i].crc)) {
   191				p = &pbuf[i];
   192				break;
   193			}
   194		}
   195	
   196		if (i == ONFI_PARAM_PAGES) {
   197			const void *srcbufs[ONFI_PARAM_PAGES];
   198			unsigned int j;
   199	
   200			for (j = 0; j < ONFI_PARAM_PAGES; j++)
   201				srcbufs[j] = pbuf + j;
   202	
   203			pr_warn("Could not find a valid ONFI parameter page, trying bit-wise majority to recover it\n");
   204			nand_bit_wise_majority(srcbufs, ONFI_PARAM_PAGES, pbuf,
   205					       sizeof(*pbuf));
   206	
   207			crc = onfi_crc16(ONFI_CRC_BASE, (u8 *)pbuf, 254);
   208			if (crc != le16_to_cpu(pbuf->crc)) {
   209				pr_err("ONFI parameter recovery failed, aborting\n");
   210				goto free_onfi_param_page;
   211			}
   212			p = pbuf;
   213		}
   214	
   215		if (chip->manufacturer.desc && chip->manufacturer.desc->ops &&
   216		    chip->manufacturer.desc->ops->fixup_onfi_param_page)
   217			chip->manufacturer.desc->ops->fixup_onfi_param_page(chip, p);
   218	
   219		/* Check version */
   220		val = le16_to_cpu(p->revision);
   221		if (val & ONFI_VERSION_2_3)
   222			onfi_version = 23;
   223		else if (val & ONFI_VERSION_2_2)
   224			onfi_version = 22;
   225		else if (val & ONFI_VERSION_2_1)
   226			onfi_version = 21;
   227		else if (val & ONFI_VERSION_2_0)
   228			onfi_version = 20;
   229		else if (val & ONFI_VERSION_1_0)
   230			onfi_version = 10;
   231	
   232		if (!onfi_version) {
   233			pr_info("unsupported ONFI version: %d\n", val);
   234			goto free_onfi_param_page;
   235		}
   236	
   237		sanitize_string(p->manufacturer, sizeof(p->manufacturer));
   238		sanitize_string(p->model, sizeof(p->model));
   239		chip->parameters.model = kstrdup(p->model, GFP_KERNEL);
   240		if (!chip->parameters.model) {
   241			ret = -ENOMEM;
   242			goto free_onfi_param_page;
   243		}
   244	
   245		memorg->pagesize = le32_to_cpu(p->byte_per_page);
   246		mtd->writesize = memorg->pagesize;
   247	
   248		/*
   249		 * pages_per_block and blocks_per_lun may not be a power-of-2 size
   250		 * (don't ask me who thought of this...). MTD assumes that these
   251		 * dimensions will be power-of-2, so just truncate the remaining area.
   252		 */
   253		memorg->pages_per_eraseblock =
   254				1 << (fls(le32_to_cpu(p->pages_per_block)) - 1);
   255		mtd->erasesize = memorg->pages_per_eraseblock * memorg->pagesize;
   256	
   257		memorg->oobsize = le16_to_cpu(p->spare_bytes_per_page);
   258		mtd->oobsize = memorg->oobsize;
   259	
   260		memorg->luns_per_target = p->lun_count;
   261		memorg->planes_per_lun = 1 << p->interleaved_bits;
   262	
   263		/* See erasesize comment */
   264		memorg->eraseblocks_per_lun =
   265			1 << (fls(le32_to_cpu(p->blocks_per_lun)) - 1);
   266		memorg->max_bad_eraseblocks_per_lun = le32_to_cpu(p->blocks_per_lun);
   267		memorg->bits_per_cell = p->bits_per_cell;
   268	
   269		if (le16_to_cpu(p->features) & ONFI_FEATURE_16_BIT_BUS)
   270			chip->options |= NAND_BUSWIDTH_16;
   271	
   272		if (p->ecc_bits != 0xff) {
   273			struct nand_ecc_props requirements = {
   274				.strength = p->ecc_bits,
   275				.step_size = 512,
   276			};
   277	
   278			nanddev_set_ecc_requirements(base, &requirements);
   279		} else if (onfi_version >= 21 &&
   280			(le16_to_cpu(p->features) & ONFI_FEATURE_EXT_PARAM_PAGE)) {
   281	
   282			/*
   283			 * The nand_flash_detect_ext_param_page() uses the
   284			 * Change Read Column command which maybe not supported
   285			 * by the chip->legacy.cmdfunc. So try to update the
   286			 * chip->legacy.cmdfunc now. We do not replace user supplied
   287			 * command function.
   288			 */
   289			nand_legacy_adjust_cmdfunc(chip);
   290	
   291			/* The Extended Parameter Page is supported since ONFI 2.1. */
   292			if (nand_flash_detect_ext_param_page(chip, p))
   293				pr_warn("Failed to detect ONFI extended param page\n");
   294		} else {
   295			pr_warn("Could not retrieve ONFI ECC requirements\n");
   296		}
   297	
   298		/* Save some parameters from the parameter page for future use */
   299		if (le16_to_cpu(p->opt_cmd) & ONFI_OPT_CMD_SET_GET_FEATURES) {
   300			chip->parameters.supports_set_get_features = true;
   301			bitmap_set(chip->parameters.get_feature_list,
   302				   ONFI_FEATURE_ADDR_TIMING_MODE, 1);
   303			bitmap_set(chip->parameters.set_feature_list,
   304				   ONFI_FEATURE_ADDR_TIMING_MODE, 1);
   305		}
   306	
   307		onfi = kzalloc(sizeof(*onfi), GFP_KERNEL);
   308		if (!onfi) {
   309			ret = -ENOMEM;
   310			goto free_model;
   311		}
   312	
   313		onfi->version = onfi_version;
   314		onfi->tPROG = le16_to_cpu(p->t_prog);
   315		onfi->tBERS = le16_to_cpu(p->t_bers);
   316		onfi->tR = le16_to_cpu(p->t_r);
   317		onfi->tCCS = le16_to_cpu(p->t_ccs);
   318		onfi->sdr_timing_modes = le16_to_cpu(p->sdr_timing_modes);
 > 319		if (p->features & ONFI_FEATURE_NV_DDR)

---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org
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