[PATCH v3] arm64: dts: marvell: add Globalscale MOCHAbin

Pali Rohár pali at kernel.org
Tue Sep 28 08:48:01 PDT 2021


On Thursday 23 September 2021 20:18:30 Robert Marko wrote:
> +/* SPI-NOR */
> +&cp0_spi1{
> +	status = "okay";
> +
> +	pinctrl-names = "default";
> +	pinctrl-0 = <&cp0_spi1_pins>;
> +
> +	spi-flash at 0 {
> +		#address-cells = <1>;
> +		#size-cells = <1>;
> +		compatible = "jedec,spi-nor";
> +		reg = <0>;
> +		spi-max-frequency = <20000000>;
> +
> +		partitions {
> +			compatible = "fixed-partitions";
> +			#address-cells = <1>;
> +			#size-cells = <1>;
> +
> +			partition at 0 {
> +				label = "u-boot";
> +				reg = <0x0 0x3e0000>;

For sure U-Boot cannot start at offset zero as this is 64-bit ARM board
which uses at least TF-A firmware, which loads U-Boot.

Also on these mvebu SoCs is executed prior TF-A firmware custom Marvell
initialization code responsible for DDR training.

So on offset zero you cannot flash U-Boot, otherwise board would not be
bootable.

So I would suggest to either define correct offset at which U-Boot
starts or rename this whole partition to something generic, e.g. with
label "firmware". To not expose that on zero offset is stored U-Boot.

Due to how big is this partition I guess it contains concatenation of
various firmware and bootloader parts.

> +				read-only;
> +			};
> +
> +			partition at 3e0000 {
> +				label = "hw-info";
> +				reg = <0x3e0000 0x10000>;
> +				read-only;
> +			};
> +
> +			partition at 3f0000 {
> +				label = "u-boot-env";
> +				reg = <0x3f0000 0x10000>;
> +			};
> +		};
> +	};
> +};



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