[PATCH v2 4/5] ARM: dts: imx6sl: fix mmc compatibles

Ahmad Fatoum a.fatoum at pengutronix.de
Sat Sep 25 23:54:35 PDT 2021


Hello Andreas,

On 24.09.21 11:14, Andreas Kemnade wrote:
> Binding specification only allows one compatible here.

This same change was NACKed by Lucas here:
https://lore.kernel.org/linux-devicetree/72e1194e10ccb4f87aed96265114f0963e805092.camel@pengutronix.de/

I also think the schema should be fixed instead.

Cheers,
Ahmad

> 
> Signed-off-by: Andreas Kemnade <andreas at kemnade.info>
> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski at canonical.com>
> ---
>  arch/arm/boot/dts/imx6sl.dtsi | 8 ++++----
>  1 file changed, 4 insertions(+), 4 deletions(-)
> 
> diff --git a/arch/arm/boot/dts/imx6sl.dtsi b/arch/arm/boot/dts/imx6sl.dtsi
> index c7d907c5c352..887d2a80a335 100644
> --- a/arch/arm/boot/dts/imx6sl.dtsi
> +++ b/arch/arm/boot/dts/imx6sl.dtsi
> @@ -856,7 +856,7 @@ fec: ethernet at 2188000 {
>  			};
>  
>  			usdhc1: mmc at 2190000 {
> -				compatible = "fsl,imx6sl-usdhc", "fsl,imx6q-usdhc";
> +				compatible = "fsl,imx6sl-usdhc";
>  				reg = <0x02190000 0x4000>;
>  				interrupts = <0 22 IRQ_TYPE_LEVEL_HIGH>;
>  				clocks = <&clks IMX6SL_CLK_USDHC1>,
> @@ -868,7 +868,7 @@ usdhc1: mmc at 2190000 {
>  			};
>  
>  			usdhc2: mmc at 2194000 {
> -				compatible = "fsl,imx6sl-usdhc", "fsl,imx6q-usdhc";
> +				compatible = "fsl,imx6sl-usdhc";
>  				reg = <0x02194000 0x4000>;
>  				interrupts = <0 23 IRQ_TYPE_LEVEL_HIGH>;
>  				clocks = <&clks IMX6SL_CLK_USDHC2>,
> @@ -880,7 +880,7 @@ usdhc2: mmc at 2194000 {
>  			};
>  
>  			usdhc3: mmc at 2198000 {
> -				compatible = "fsl,imx6sl-usdhc", "fsl,imx6q-usdhc";
> +				compatible = "fsl,imx6sl-usdhc";
>  				reg = <0x02198000 0x4000>;
>  				interrupts = <0 24 IRQ_TYPE_LEVEL_HIGH>;
>  				clocks = <&clks IMX6SL_CLK_USDHC3>,
> @@ -892,7 +892,7 @@ usdhc3: mmc at 2198000 {
>  			};
>  
>  			usdhc4: mmc at 219c000 {
> -				compatible = "fsl,imx6sl-usdhc", "fsl,imx6q-usdhc";
> +				compatible = "fsl,imx6sl-usdhc";
>  				reg = <0x0219c000 0x4000>;
>  				interrupts = <0 25 IRQ_TYPE_LEVEL_HIGH>;
>  				clocks = <&clks IMX6SL_CLK_USDHC4>,
> 


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